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/linux-6.12.1/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: pwm-backlight
10 - Lee Jones <lee@kernel.org>
11 - Daniel Thompson <daniel.thompson@linaro.org>
12 - Jingoo Han <jingoohan1@gmail.com>
15 - $ref: common.yaml#
19 const: pwm-backlight
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple MMC power sequence provider
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 The purpose of the simple MMC power sequence provider is to supports a set
19 const: mmc-pwrseq-simple
21 reset-gpios:
27 at initialization and prior we start the power up procedure of the card.
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/linux-6.12.1/tools/power/pm-graph/config/
Dsuspend-x2-proc.cfg2 # Proc S3 (Suspend to Mem) x2 test - includes user processes
5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/suspend-proc.cfg
14 # ---- General Options ----
26 output-dir: suspend-{hostname}-{date}-{time}-x2-proc
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo mem > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
[all …]
Dstandby-dev.cfg2 # Dev S1 (Standby) test - includes src calls / kernel threads
5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/standby-dev.cfg
14 # ---- General Options ----
26 output-dir: standby-{hostname}-{date}-{time}-dev
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo standby > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
[all …]
Dsuspend-dev.cfg2 # Dev S3 (Suspend to Mem) test - includes src calls / kernel threads
5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/suspend-dev.cfg
14 # ---- General Options ----
26 output-dir: suspend-{hostname}-{date}-{time}-dev
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo mem > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
[all …]
Dfreeze-dev.cfg2 # Dev S2 (Freeze) test - includes src calls / kernel threads
5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/freeze-dev.cfg
14 # ---- General Options ----
26 output-dir: freeze-{hostname}-{date}-{time}-dev
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo freeze > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
[all …]
Dfreeze-callgraph.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/freeze-callgraph.cfg
15 # ---- General Options ----
27 output-dir: freeze-{hostname}-{date}-{time}-cg
38 # insert a small visible gap between suspend and resume on the timeline (default: false)
41 # ---- Advanced Options ----
44 # command: echo freeze > /sys/power/state
58 # Back to Back Suspend Delay
59 # Time delay between the two test runs in ms (default: 0 ms)
62 # Pre Suspend Delay
[all …]
Dstandby-callgraph.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/standby-callgraph.cfg
15 # ---- General Options ----
27 output-dir: standby-{hostname}-{date}-{time}-cg
38 # insert a small visible gap between suspend and resume on the timeline (default: false)
41 # ---- Advanced Options ----
44 # command: echo standby > /sys/power/state
58 # Back to Back Suspend Delay
59 # Time delay between the two test runs in ms (default: 0 ms)
62 # Pre Suspend Delay
[all …]
Dstandby.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/standby.cfg
14 # ---- General Options ----
26 output-dir: standby-{hostname}-{date}-{time}
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo standby > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
61 # Pre Suspend Delay
[all …]
Dsuspend.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/suspend.cfg
14 # ---- General Options ----
26 output-dir: suspend-{hostname}-{date}-{time}
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo mem > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
61 # Pre Suspend Delay
[all …]
Dfreeze.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/freeze.cfg
14 # ---- General Options ----
26 output-dir: freeze-{hostname}-{date}-{time}
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
40 # ---- Advanced Options ----
43 # command: echo freeze > /sys/power/state
57 # Back to Back Suspend Delay
58 # Time delay between the two test runs in ms (default: 0 ms)
61 # Pre Suspend Delay
[all …]
Dsuspend-callgraph.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/suspend.cfg
15 # ---- General Options ----
27 output-dir: suspend-{hostname}-{date}-{time}-cg
38 # insert a small visible gap between suspend and resume on the timeline (default: false)
41 # ---- Advanced Options ----
44 # command: echo mem > /sys/power/state
58 # Back to Back Suspend Delay
59 # Time delay between the two test runs in ms (default: 0 ms)
62 # Pre Suspend Delay
[all …]
Dexample.cfg5 # all the tool arguments so that they don't have to be given on the
9 # sudo ./sleepgraph.py -config config/example.cfg
14 # ---- General Options ----
26 output-dir: suspend-{hostname}-{date}-{time}
37 # insert a small visible gap between suspend and resume on the timeline (default: false)
49 # Enable/disable runtime suspend for all devices, restore all after test (default: no-action)
52 # Turn display on/off for test
53 # Switch the display on/off for the test using xset (default: no-action)
54 # display: on
57 # Print the status of the test run in the given file (default: no-action)
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/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
25 stdout-path = "serial0:115200n8";
30 regulators-2 {
[all …]
Dsc7280-herobrine-crd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
21 * On most herobrine boards PPVAR_SYS directly provides VREG_EDP_BL.
22 * However, on CRD there's an extra regulator in the way. Since this
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_edp_bl_crd";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8195-cherry-dojo-r1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include "mt8195-cherry.dtsi"
10 chassis-type = "convertible";
11 compatible = "google,dojo-sku7", "google,dojo-sku5",
12 "google,dojo-sku3", "google,dojo-sku1",
18 realtek,amic-delay-ms = <250>;
25 reset-gpios = <&pio 100 GPIO_ACTIVE_LOW>;
26 sound-name-prefix = "Right";
27 #sound-dai-cells = <0>;
[all …]
Dmt8183-kukui-jacuzzi-fennel-sku6.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi-fennel.dtsi"
8 #include "mt8183-kukui-audio-da7219-rt1015p.dtsi"
12 chassis-type = "convertible";
13 compatible = "google,fennel-sku6", "google,fennel", "mediatek,mt8183";
19 compatible = "hid-over-i2c";
21 interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&touchscreen_pins>;
[all …]
Dmt8183-kukui-jacuzzi-fennel-sku7.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi-fennel.dtsi"
8 #include "mt8183-kukui-audio-ts3a227e-rt1015p.dtsi"
12 chassis-type = "convertible";
13 compatible = "google,fennel-sku7", "google,fennel", "mediatek,mt8183";
19 compatible = "hid-over-i2c";
21 interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&touchscreen_pins>;
[all …]
Dmt8183-kukui-kakadu.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-kakadu.dtsi"
8 #include "mt8183-kukui-audio-da7219-rt1015p.dtsi"
12 chassis-type = "tablet";
13 compatible = "google,kakadu-rev3", "google,kakadu-rev2",
19 compatible = "hid-over-i2c";
21 pinctrl-names = "default";
22 pinctrl-0 = <&open_touch>;
24 interrupts-extended = <&pio 155 IRQ_TYPE_EDGE_FALLING>;
[all …]
Dmt8183-kukui-jacuzzi-burnet.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi.dtsi"
8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi"
12 chassis-type = "convertible";
17 mediatek,dmic-mode = <1>; /* one-wire */
22 compatible = "hid-over-i2c";
24 pinctrl-names = "default";
25 pinctrl-0 = <&touchscreen_pins>;
26 interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3288-veyron-edp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 backlight_regulator: backlight-regulator {
10 compatible = "regulator-fixed";
11 enable-active-high;
13 pinctrl-names = "default";
14 pinctrl-0 = <&bl_pwr_en>;
15 regulator-name = "backlight_regulator";
16 vin-supply = <&vcc33_sys>;
17 startup-delay-us = <15000>;
20 panel_regulator: panel-regulator {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3566-radxa-zero-3w.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-radxa-zero-3.dtsi"
9 compatible = "radxa,zero-3w", "rockchip,rk3566";
17 sdio_pwrseq: sdio-pwrseq {
18 compatible = "mmc-pwrseq-simple";
20 clock-names = "ext_clock";
21 pinctrl-names = "default";
22 pinctrl-0 = <&wifi_reg_on_h>;
23 post-power-on-delay-ms = <100>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx93-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
12 model = "Variscite VAR-SOM-MX93 module";
13 compatible = "variscite,var-som-mx93", "fsl,imx93";
15 mmc_pwrseq: mmc-pwrseq {
16 compatible = "mmc-pwrseq-simple";
17 post-power-on-delay-ms = <100>;
18 power-off-delay-us = <10000>;
19 reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>, /* WIFI_RESET */
23 reg_eqos_phy: regulator-eqos-phy {
[all …]
/linux-6.12.1/drivers/hid/i2c-hid/
Di2c-hid-of.c8 * This code was forked out of the core code, which was partly based on
12 * Copyright (c) 2000-2005 Vojtech Pavlik <vojtech@suse.cz>
13 * Copyright (c) 2005 Michael Haboustak <mike-@cinci.rr.com> for Concept2, Inc
14 * Copyright (c) 2007-2008 Oliver Neukum
15 * Copyright (c) 2006-2010 Jiri Kosina
22 #include <linux/delay.h>
33 #include "i2c-hid.h"
48 struct device *dev = &ihid_of->client->dev; in i2c_hid_of_power_up()
51 ret = regulator_bulk_enable(ARRAY_SIZE(ihid_of->supplies), in i2c_hid_of_power_up()
52 ihid_of->supplies); in i2c_hid_of_power_up()
[all …]

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