Home
last modified time | relevance | path

Searched +full:port +full:- +full:mapping (Results 1 – 25 of 1047) sorted by relevance

12345678910>>...42

/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dqcom,wcd937x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd937x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9370/WCD9375 Codec is a standalone Hi-Fi audio codec IC.
24 qcom,tx-port-mapping:
26 Specifies static port mapping between device and host tx ports.
27 In the order of the device port index which are adc1_port, adc23_port,
31 WCD9370 TX Port 1 (ADC1) <=> SWR2 Port 2
[all …]
Dqcom,wcd939x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd939x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9390/WCD9395 Codec is a standalone Hi-Fi audio codec IC.
23 qcom,tx-port-mapping:
25 Specifies static port mapping between device and host tx ports.
26 In the order of the device port index.
27 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
Dqcom,wcd938x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd938x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
24 qcom,tx-port-mapping:
26 Specifies static port mapping between slave and master tx ports.
27 In the order of slave port index.
28 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
/linux-6.12.1/drivers/gpu/drm/
Ddrm_of.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/media-bus-format.h>
25 * drm_of_crtc_port_mask - find the mask of a registered CRTC by port OF node
27 * @port: port OF node
29 * Given a port OF node, return the possible mask of the corresponding
33 struct device_node *port) in drm_of_crtc_port_mask() argument
39 if (tmp->port == port) in drm_of_crtc_port_mask()
50 * drm_of_find_possible_crtcs - find the possible CRTCs for an encoder port
52 * @port: encoder port to scan for endpoints
54 * Scan all endpoints attached to a port, locate their attached CRTCs,
[all …]
/linux-6.12.1/drivers/net/ethernet/cortina/
Dgemini.c1 // SPDX-License-Identifier: GPL-2.0
11 * Michał Mirosław <mirq-linux@rere.qmqm.pl>
22 #include <linux/dma-mapping.h>
46 #define DRV_NAME "gmac-gemini"
49 static int debug = -1;
86 * struct gmac_queue_page - page buffer per-page info
88 * @mapping: the dma address handle
92 dma_addr_t mapping; member
156 spinlock_t irq_lock; /* Locks IRQ-related registers */
227 struct gemini_ethernet_port *port = netdev_priv(netdev); in gmac_update_config0_reg() local
[all …]
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/en/tc/
Dint_port.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
5 #include "en/mapping.h"
15 u32 mapping; member
28 struct mapping_ctx *metadata_mapping; /* Metadata for source port rewrite and matching */
34 MLX5_CAP_GEN(esw->dev, reg_c_preserve); in mlx5e_tc_int_port_supported()
39 return int_port->match_metadata; in mlx5e_tc_int_port_get_metadata()
46 * to int port or it came from the uplink, going in mlx5e_tc_int_port_get_flow_source()
47 * via internal port and hairpinned back to uplink in mlx5e_tc_int_port_get_flow_source()
48 * so we set the source to any port in this case. in mlx5e_tc_int_port_get_flow_source()
50 return int_port->type == MLX5E_TC_INT_PORT_EGRESS ? in mlx5e_tc_int_port_get_flow_source()
[all …]
/linux-6.12.1/drivers/net/ethernet/microchip/vcap/
Dvcap_ag_api.h1 /* SPDX-License-Identifier: BSD-3-Clause */
6 /* This file is autogenerated by cml-utils 2023-03-13 10:16:42 +0100.
63 * Used by 802.1BR Bridge Port Extension in an E-Tag
65 * Used by 802.1BR Bridge Port Extension in an E-Tag
67 * Set for frames containing an E-TAG (802.1BR Ethertype 893f)
69 * E-Tag group bits in 802.1BR Bridge Port Extension
71 * Used by 802.1BR Bridge Port Extension in an E-Tag
73 * Used by 802.1BR Bridge Port Extension in an E-Tag
78 * First DEI in multiple vlan tags (outer tag or default port tag)
86 * First PCP in multiple vlan tags (outer tag or default port tag)
[all …]
/linux-6.12.1/drivers/net/dsa/microchip/
Dksz_dcb.c1 // SPDX-License-Identifier: GPL-2.0
54 /* ksz_supported_apptrust[] - Supported apptrust selectors and Priority Order
58 * the index within the array indicates the priority of the selector - lower
65 * non-configurable precedence where certain types of priority information
68 * 1. Tail Tag - Highest priority, overrides ACL, VLAN PCP, and DSCP priorities.
69 * 2. ACL - Overrides VLAN PCP and DSCP priorities.
70 * 3. VLAN PCP - Overrides DSCP priority.
71 * 4. DSCP - Lowest priority, does not override any other priority source.
77 * DCB_APP_SEL_PCP - Priority Code Point selector
78 * IEEE_8021QAZ_APP_SEL_DSCP - Differentiated Services Code Point selector
[all …]
/linux-6.12.1/drivers/net/ethernet/microchip/lan966x/
Dlan966x_dcb.c1 // SPDX-License-Identifier: GPL-2.0+
40 for (int i = 0; i < conf->nselectors; i++) in lan966x_dcb_apptrust_contains()
41 if (conf->selectors[i] == selector) in lan966x_dcb_apptrust_contains()
51 struct lan966x_port *port = netdev_priv(dev); in lan966x_dcb_app_update() local
57 /* Get pcp ingress mapping */ in lan966x_dcb_app_update()
64 /* Get dscp ingress mapping */ in lan966x_dcb_app_update()
74 qos.default_prio = fls(qos.default_prio) - 1; in lan966x_dcb_app_update()
76 /* Get pcp rewrite mapping */ in lan966x_dcb_app_update()
83 qos.pcp_rewr.map[i] = fls(pcp_rewr_map.map[i]) - 1; in lan966x_dcb_app_update()
86 /* Get dscp rewrite mapping */ in lan966x_dcb_app_update()
[all …]
/linux-6.12.1/include/linux/
Dcb710.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright by Michał Mirosław, 2008-2009
21 /* per-virtual-slot structure */
28 /* per-device structure */
50 /* slot port accessors - so the logic is more clear in the code */
53 unsigned port, u##t value) \
55 iowrite##t(value, slot->iobase + port); \
59 unsigned port) \
61 return ioread##t(slot->iobase + port); \
65 unsigned port, u##t set, u##t clear) \
[all …]
/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/
Dsparx5_dcb.c1 // SPDX-License-Identifier: GPL-2.0+
51 switch (app->selector) { in sparx5_dcb_app_validate()
54 if (app->protocol != 0) in sparx5_dcb_app_validate()
55 err = -EINVAL; in sparx5_dcb_app_validate()
56 else if (app->priority >= SPX5_PRIOS) in sparx5_dcb_app_validate()
57 err = -ERANGE; in sparx5_dcb_app_validate()
61 if (app->protocol >= SPARX5_PORT_QOS_DSCP_COUNT) in sparx5_dcb_app_validate()
62 err = -EINVAL; in sparx5_dcb_app_validate()
63 else if (app->priority >= SPX5_PRIOS) in sparx5_dcb_app_validate()
64 err = -ERANGE; in sparx5_dcb_app_validate()
[all …]
/linux-6.12.1/drivers/infiniband/core/
Diwpm_msg.c15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
42 * iwpm_valid_pid - Check if the userspace iwarp port mapper pid is valid
52 * iwpm_register_pid - Send a netlink query to userspace
53 * to get the iwarp port mapper pid
54 * @pm_msg: Contains driver info to send to the userspace port mapper
70 int ret = -EINVAL; in iwpm_register_pid()
80 nlh->nlmsg_seq = iwpm_get_nlmsg_seq(); in iwpm_register_pid()
81 nlmsg_request = iwpm_get_nlmsg_request(nlh->nlmsg_seq, nl_client, GFP_KERNEL); in iwpm_register_pid()
94 pm_msg->if_name, IWPM_NLA_REG_IF_NAME); in iwpm_register_pid()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
23 "di0_pll" - LDB LVDS channel 0 mux
[all …]
/linux-6.12.1/drivers/net/dsa/mv88e6xxx/
Dglobal1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
18 int addr = chip->info->global1_addr; in mv88e6xxx_g1_read()
25 int addr = chip->info->global1_addr; in mv88e6xxx_g1_write()
33 return mv88e6xxx_wait_bit(chip, chip->info->global1_addr, reg, in mv88e6xxx_g1_wait_bit()
40 return mv88e6xxx_wait_mask(chip, chip->info->global1_addr, reg, in mv88e6xxx_g1_wait_mask()
98 /* Returns 0 when done, -EBUSY when waiting, other negative codes on error */
106 dev_err(chip->dev, "Error reading status"); in mv88e6xxx_g1_is_eeprom_done()
116 return -EBUSY; in mv88e6xxx_g1_is_eeprom_done()
135 if (ret != -EBUSY) in mv88e6xxx_g1_wait_eeprom_done()
[all …]
Dglobal1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
174 /* Offset 0x10: IP-PRI Mapping Register 0
175 * Offset 0x11: IP-PRI Mapping Register 1
176 * Offset 0x12: IP-PRI Mapping Register 2
177 * Offset 0x13: IP-PRI Mapping Register 3
178 * Offset 0x14: IP-PRI Mapping Register 4
179 * Offset 0x15: IP-PRI Mapping Register 5
180 * Offset 0x16: IP-PRI Mapping Register 6
181 * Offset 0x17: IP-PRI Mapping Register 7
[all …]
/linux-6.12.1/tools/testing/selftests/drivers/net/mlxsw/
Degress_vid_classification.sh2 # SPDX-License-Identifier: GPL-2.0
5 # configuration does not impact switch behavior. Verify that {RIF, Port}->VID
6 # mapping is added correctly for existing {Port, VID}->FID mapping and that
7 # {RIF, Port}->VID mapping is added correctly for new {Port, VID}->FID mapping.
9 # +-------------------+ +--------------------+
16 # +----------------|--+ +--|-----------------+
18 # +----------------|-------------------------|-----------------+
21 # | +--------------|-------------------------|---------------+ |
26 # | +--------------------------------------------------------+ |
32 # +---------------|--------------------------------------------+
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/panel/
Dadvantech,idk-2121wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
18 The panel expects odd pixels on the first port, and even pixels on the
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dlvds-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
28 Those devices have been marketed under the FPD-Link and FlatLink brand names
34 - items:
35 - enum:
[all …]
/linux-6.12.1/arch/alpha/kernel/
Dsmc37c669.c60 * er 28-Jan-1997 Initial Entry
69 ** The mask acts as a flag used in mapping actual ISA IRQs (0 - 15)
70 ** to device IRQs (A - H).
83 ** The mask acts as a flag used in mapping actual ISA DMA
84 ** channels to device DMA channels (A - C).
218 ** CR00 - default value 0x28
221 ** 0x - 30ua pull-ups on nIDEEN, nHDCS0, NHDCS1
222 ** 11 - IRQ_H available as IRQ output,
224 ** 10 - nIDEEN, nHDCS0, nHDCS1 used to control IDE
247 ** CR01 - default value 0x9C
[all …]
/linux-6.12.1/drivers/net/ethernet/sunplus/
Dspl2sw_int.c1 // SPDX-License-Identifier: GPL-2.0
30 int port; in spl2sw_rx_poll() local
34 /* Process high-priority queue and then low-priority queue. */ in spl2sw_rx_poll()
36 rx_pos = comm->rx_pos[queue]; in spl2sw_rx_poll()
37 rx_count = comm->rx_desc_num[queue]; in spl2sw_rx_poll()
40 sinfo = comm->rx_skb_info[queue] + rx_pos; in spl2sw_rx_poll()
41 desc = comm->rx_desc[queue] + rx_pos; in spl2sw_rx_poll()
42 cmd = desc->cmd1; in spl2sw_rx_poll()
47 port = FIELD_GET(RXD_PKT_SP, cmd); in spl2sw_rx_poll()
48 if (port < MAX_NETDEV_NUM && comm->ndev[port]) in spl2sw_rx_poll()
[all …]
/linux-6.12.1/net/mptcp/
Dmib.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 MPTCP_MIB_MPCAPABLEPASSIVEFALLBACK,/* Server-side fallback during 3-way handshake */
12 MPTCP_MIB_MPCAPABLEACTIVEFALLBACK, /* Client-side fallback during 3-way handshake */
13 MPTCP_MIB_MPCAPABLEACTIVEDROP, /* Client-side fallback due to a MPC drop */
14 MPTCP_MIB_MPCAPABLEACTIVEDISABLED, /* Client-side disabled due to past issues */
15 MPTCP_MIB_MPCAPABLEENDPATTEMPT, /* Prohibited MPC to port-based endp */
17 MPTCP_MIB_RETRANSSEGS, /* Segments retransmitted at the MPTCP-level */
30 MPTCP_MIB_DSSNOMATCH, /* Received a new mapping that did not match the previous one */
33 MPTCP_MIB_INFINITEMAPTX, /* Sent an infinite mapping */
34 MPTCP_MIB_INFINITEMAPRX, /* Received an infinite mapping */
[all …]
/linux-6.12.1/include/asm-generic/
Diomap.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * These are the "generic" interfaces for doing new-style
10 * memory-mapped or PIO accesses. Architectures may do
11 * their own arch-optimized versions, these just act as
12 * wrappers around the old-style IO register access functions:
21 * encoded in the hardware mapping set up by the mapping functions
77 * They do _not_ update the port address. If you
82 extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);
83 extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);
84 extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/supply/
Dgpio-charger.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/gpio-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
19 const: gpio-charger
21 charger-type:
23 - unknown
24 - battery
25 - ups
[all …]
/linux-6.12.1/drivers/gpu/drm/rockchip/
Drockchip_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author:Mark Yao <mark.yao@rock-chips.com>
9 #include <linux/dma-mapping.h>
28 #include <asm/dma-iommu.h>
48 * Attach a (component) device to the shared drm dma mapping from master drm
50 * mapping.
55 struct rockchip_drm_private *private = drm_dev->dev_private; in rockchip_drm_dma_attach_device()
58 if (!private->domain) in rockchip_drm_dma_attach_device()
62 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev); in rockchip_drm_dma_attach_device() local
64 if (mapping) { in rockchip_drm_dma_attach_device()
[all …]
/linux-6.12.1/Documentation/core-api/
Dcachetlb.rst25 virtual-->physical address translations obtained from the software
59 modifications for the address space 'vma->vm_mm' in the range
60 'start' to 'end-1' will be visible to the cpu. That is, after
62 virtual addresses in the range 'start' to 'end-1'.
67 The interface is provided in hopes that the port can find
78 address space is available via vma->vm_mm. Also, one may
79 test (vma->vm_flags & VM_EXEC) to see if this region is
81 split-tlb type setups).
84 page table modification for address space 'vma->vm_mm' for
87 'vma->vm_mm' for virtual address 'addr'.
[all …]

12345678910>>...42