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/linux-6.12.1/arch/arm/boot/dts/marvell/
Darmada-370-seagate-nas-4bay.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
13 * Product name : Seagate NAS 4-Bay
14 * Code name (board/PCB) : Dart 4-Bay
19 /dts-v1/;
20 #include "armada-370-seagate-nas-xbay.dtsi"
21 #include <dt-bindings/leds/leds-ns2.h>
24 model = "Seagate NAS 4-Bay (Dart, SRPD40)";
25 compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
28 internal-regs {
[all …]
Darmada-388-gp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * (RD-88F6820-GP)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 /dts-v1/;
12 #include "armada-388.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Marvell Armada 388 DB-88F6820-GP";
17 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380";
20 stdout-path = "serial0:115200n8";
35 internal-regs {
[all …]
Darmada-xp-netgear-rn2120.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-xp-mv78230.dtsi"
16 …compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,arm…
19 stdout-path = "serial0:115200n8";
33 internal-regs {
41 clock-frequency = <400000>;
45 * MGT4012XB-O20, 8000RPM) near eSATA port */
[all …]
Dkirkwood-net5big.dts1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 /dts-v1/;
17 #include "kirkwood-6281.dtsi"
18 #include "kirkwood-netxbig.dtsi"
22 compatible = "lacie,net5big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
33 compatible = "regulator-fixed";
35 regulator-name = "hdd1power";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
[all …]
Darmada-xp-synology-ds414.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
[all …]
Darmada-370-netgear-rn104.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-370.dtsi"
16 compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
19 stdout-path = "serial0:115200n8";
32 internal-regs {
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
[all …]
Darmada-388-helios4.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /dts-v1/;
11 #include "armada-388.dtsi"
12 #include "armada-38x-solidrun-microsom.dtsi"
25 /* So that mvebu u-boot can update the MAC addresses */
30 stdout-path = "serial0:115200n8";
33 reg_12v: regulator-12v {
34 compatible = "regulator-fixed";
35 regulator-name = "power_brick_12V";
36 regulator-min-microvolt = <12000000>;
[all …]
Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dbrcm,sata-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,sata-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom SATA3 PHY
10 - Florian Fainelli <f.fainelli@gmail.com>
14 pattern: "^sata[-|_]phy(@.*)?$"
18 - items:
19 - enum:
20 - brcm,bcm7216-sata-phy
[all …]
/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm63138.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&gic>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a9";
28 next-level-cache = <&L2>;
[all …]
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "brcm,brahma-b15";
22 enable-method = "brcm,brahma-b15";
27 compatible = "brcm,brahma-b15";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/ata/
Dapm-xgene.txt1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
7 - compatible : Shall contain:
8 * "apm,xgene-ahci"
9 - reg : First memory resource shall be the AHCI memory
19 - interrupts : Interrupt-specifier for SATA host controller IRQ.
20 - clocks : Reference to the clock entry.
21 - phys : A list of phandles + phy-specifiers, one for each
22 entry in phy-names.
23 - phy-names : Should contain:
[all …]
/linux-6.12.1/drivers/ata/
Dahci_brcm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Broadcom SATA3 AHCI Controller Driver
5 * Copyright © 2009-2015 Broadcom Corporation
24 #define DRV_NAME "brcm-ahci"
28 #define MMIO_ENDIAN_SHIFT 0 /* CPU->AHCI */
29 #define DMADESC_ENDIAN_SHIFT 2 /* AHCI->DDR */
30 #define DMADATA_ENDIAN_SHIFT 4 /* AHCI->DDR */
51 /* On big-endian MIPS, buses are reversed to big endian, so switch them back */
53 #define DATA_ENDIAN 2 /* AHCI->DDR inbound accesses */
54 #define MMIO_ENDIAN 2 /* CPU->AHCI outbound accesses */
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/linux-6.12.1/arch/mips/boot/dts/brcm/
Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/apm/
Dapm-merlin.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
10 /include/ "apm-shadowcat.dtsi"
13 model = "APM X-Gene Merlin board";
14 compatible = "apm,merlin", "apm,xgene-shadowcat";
23 gpio-keys {
24 compatible = "gpio-keys";
28 linux,input-type = <0x1>;
29 interrupt-parent = <&sbgpio>;
35 compatible = "apm,merlin-poweroff-mailbox", "syscon";
[all …]
Dapm-storm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2018-2020 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
Dfsl-lx2162a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "LTM4619-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
[all …]
Dfsl-lx2160a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.12.1/drivers/phy/broadcom/
Dphy-brcm-sata.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Broadcom SATA3 AHCI Controller PHY Driver
16 #include <linux/phy/phy.h>
27 /* The older SATA PHY registers duplicated per port registers within the map,
32 /* Register offset between PHYs in PHY control space */
63 struct phy *phy; member
196 struct brcm_sata_phy *priv = port->phy_priv; in brcm_sata_ctrl_base()
199 switch (priv->version) { in brcm_sata_ctrl_base()
204 dev_err(priv->dev, "invalid phy version\n"); in brcm_sata_ctrl_base()
208 return priv->ctrl_base + (port->portnum * size); in brcm_sata_ctrl_base()
[all …]
/linux-6.12.1/arch/arm/mach-orion5x/
Dts409-setup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * QNAP TS-409 Board Setup
24 #include <asm/mach-types.h>
30 #include "tsx09-common.h"
33 * QNAP TS-409 Info
37 * QNAP TS-409 hardware :
38 * - Marvell 88F5281-D0
39 * - Marvell 88SX7042 SATA controller (PCIe)
40 * - Marvell 88E1118 Gigabit Ethernet PHY
41 * - RTC S35390A (@0x30) on I2C bus
[all …]

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