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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dmicrochip,lan966x-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Lan966x Serdes controller
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
16 interfaces. The Serdes controller will allow to configure these interfaces
23 interface SerDes 2.
27 pattern: "^serdes@[0-9a-f]+$"
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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Lan966x Ethernet switch controller
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
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/linux-6.12.1/arch/arm/boot/dts/microchip/
Dlan966x-pcb8290.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x-pcb8290.dts - Device Tree file for LAN966X-PCB8290 board
9 /dts-v1/;
10 #include "lan966x.dtsi"
11 #include "dt-bindings/phy/phy-lan966x-serdes.h"
15 compatible = "microchip,lan9668-pcb8290", "microchip,lan9668", "microchip,lan966";
17 gpio-restart {
18 compatible = "gpio-restart";
29 miim_a_pins: mdio-pins {
35 pps_out_pins: pps-out-pins {
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Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "lan966x.dtsi"
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
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Dlan966x-pcb8291.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8291.dts - Device Tree file for PCB8291
5 /dts-v1/;
6 #include "lan966x.dtsi"
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
14 stdout-path = "serial0:115200n8";
21 gpio-restart {
22 compatible = "gpio-restart";
[all …]
Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
6 #include "lan966x.dtsi"
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
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Dlan966x-kontron-kswitch-d10-mmt-8g.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi"
11 compatible = "kontron,kswitch-d10-mmt-8g", "kontron,s1921",
16 phy2: ethernet-phy@3 {
18 interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
21 phy3: ethernet-phy@4 {
23 interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
28 phys = <&serdes 2 SERDES6G(0)>;
29 phy-handle = <&phy2>;
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Dlan966x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/dma/at91.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/microchip,lan966x.h>
21 interrupt-parent = <&gic>;
22 #address-cells = <1>;
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Dlan966x-kontron-kswitch-d10-mmt-6g-2gs.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS
6 /dts-v1/;
7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi"
10 model = "Kontron KSwitch D10 MMT 6G-2GS";
11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921",
21 i2c-bus = <&i2c4>;
22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>;
23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>;
24 maximum-power-milliwatt = <2500>;
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/linux-6.12.1/drivers/phy/microchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Microchip devices
7 tristate "Microchip Sparx5 SerDes PHY driver"
13 Enable this for support of the 10G/25G SerDes on Microchip Sparx5.
16 tristate "SerDes PHY driver for Microchip LAN966X"
21 Enable this for supporting SerDes muxing with Microchip LAN966X
Dlan966x_serdes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/phy.h>
8 #include <linux/phy/phy.h>
11 #include <dt-bindings/phy/phy-lan966x-serdes.h>
130 struct phy *phys[SERDES_MAX];
188 /* Note: SerDes HSIO is configured in 1G_LAN mode */ in lan966x_sd6g40_reg_cfg()
189 lan_rmw(HSIO_SD_CFG_LANE_10BIT_SEL_SET(res_struct->lane_10bit_sel) | in lan966x_sd6g40_reg_cfg()
190 HSIO_SD_CFG_RX_RATE_SET(res_struct->rx_rate) | in lan966x_sd6g40_reg_cfg()
191 HSIO_SD_CFG_TX_RATE_SET(res_struct->tx_rate) | in lan966x_sd6g40_reg_cfg()
192 HSIO_SD_CFG_TX_INVERT_SET(res_struct->tx_invert) | in lan966x_sd6g40_reg_cfg()
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/linux-6.12.1/drivers/net/ethernet/microchip/lan966x/
Dlan966x_phylink.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <linux/phy/phy.h>
14 struct lan966x_port *port = netdev_priv(to_net_dev(config->dev)); in lan966x_phylink_mac_select()
16 return &port->phylink_pcs; in lan966x_phylink_mac_select()
29 struct lan966x_port *port = netdev_priv(to_net_dev(config->dev)); in lan966x_phylink_mac_prepare()
33 if (port->serdes) { in lan966x_phylink_mac_prepare()
34 err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET, in lan966x_phylink_mac_prepare()
37 netdev_err(to_net_dev(config->dev), in lan966x_phylink_mac_prepare()
38 "Could not set mode of SerDes\n"); in lan966x_phylink_mac_prepare()
47 struct phy_device *phy, in lan966x_phylink_mac_link_up() argument
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Dlan966x_main.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/phy/phy.h>
25 #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3))
30 { .compatible = "microchip,lan966x-switch" },
68 struct lan966x *lan966x) in lan966x_create_targets() argument
83 dev_err(&pdev->dev, "Invalid resource\n"); in lan966x_create_targets()
84 return -EINVAL; in lan966x_create_targets()
87 begin[idx] = devm_ioremap(&pdev->dev, in lan966x_create_targets()
88 iores[idx]->start, in lan966x_create_targets()
91 dev_err(&pdev->dev, "Unable to get registers: %s\n", in lan966x_create_targets()
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Dlan966x_main.h1 /* SPDX-License-Identifier: GPL-2.0+ */
10 #include <linux/phy.h>
53 #define PGID_CPU (PGID_AGGR - 6)
54 #define PGID_UC (PGID_AGGR - 5)
55 #define PGID_BC (PGID_AGGR - 4)
56 #define PGID_MC (PGID_AGGR - 3)
57 #define PGID_MCIPV4 (PGID_AGGR - 2)
58 #define PGID_MCIPV6 (PGID_AGGR - 1)
60 /* Non-reserved PGIDs, used for general purpose */
85 #define SE_IDX_QUEUE 0 /* 0-79 : Queue scheduler elements */
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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