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/linux-6.12.1/Documentation/devicetree/bindings/iio/proximity/
Dsemtech,sx9324.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
32 vdd-supply:
35 svdd-supply:
38 "#io-channel-cells":
41 semtech,ph0-pin:
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/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsc7180-trogdor-quackingstick-r0-lte.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * - bits 11..8: Panel ID: 0x6 (AUO)
11 #include "sc7180-trogdor-quackingstick-r0.dts"
12 #include "sc7180-trogdor-lte-sku.dtsi"
16 compatible = "google,quackingstick-sku1536", "qcom,sc7180";
21 semtech,ph0-pin = <3 1 3>;
22 semtech,ph1-pin = <2 1 2>;
23 semtech,ph2-pin = <3 3 1>;
24 semtech,ph3-pin = <1 3 3>;
25 semtech,ph01-resolution = <1024>;
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Dsc7180-trogdor-pazquel.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "sc7180-trogdor-clamshell.dtsi"
12 semtech,ph0-pin = <1 3 3>;
13 semtech,ph1-pin = <3 1 3>;
14 semtech,ph2-pin = <1 3 3>;
15 semtech,ph3-pin = <0 0 0>;
16 semtech,ph01-resolution = <1024>;
17 semtech,ph23-resolution = <1024>;
18 semtech,startup-sensor = <1>;
19 semtech,ph01-proxraw-strength = <3>;
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/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun4i-a10-olinuxino-lime.dts2 * Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun4i-a10.dtsi"
45 #include "sunxi-common-regulators.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
50 model = "Olimex A10-OLinuXino-LIME";
51 compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10";
58 stdout-path = "serial0:115200n8";
61 hdmi-connector {
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Dsun7i-a20-olinuxino-micro.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun7i-a20.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/interrupt-controller/irq.h>
54 model = "Olimex A20-Olinuxino Micro";
55 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
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Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
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Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun6i-rtc.h>
48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
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Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
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Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
21 - const: nvidia,tegra124-pinmux
22 - items:
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/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h6-pine-h64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
22 stdout-path = "serial0:115200n8";
25 ext_osc32k: ext-osc32k-clk {
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
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Dsun50i-h6-orangepi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-h6.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
20 stdout-path = "serial0:115200n8";
24 compatible = "hdmi-connector";
26 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
30 remote-endpoint = <&hdmi_out_con>;
35 ext_osc32k: ext-osc32k-clk {
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Dsun50i-h6-orangepi-3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";
21 stdout-path = "serial0:115200n8";
25 compatible = "hdmi-connector";
26 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
31 remote-endpoint = <&hdmi_out_con>;
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Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
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/linux-6.12.1/drivers/iio/proximity/
Dsx9324.c1 // SPDX-License-Identifier: GPL-2.0
169 /* 4 channels, as defined in STAT0: PH0, PH1, PH2 and PH3. */
186 ret = regmap_read(data->regmap, SX9324_REG_AFE_PH0 + chan->channel, &val); in sx9324_phase_configuration_show()
195 buf[len - 1] = '\n'; in sx9324_phase_configuration_show()
315 regmap_reg_range(SX9324_REG_IRQ_CFG2 + 1, SX9324_REG_GNRL_CTRL0 - 1),
316 regmap_reg_range(SX9324_REG_GNRL_CTRL1 + 1, SX9324_REG_AFE_CTRL0 - 1),
317 regmap_reg_range(SX9324_REG_AFE_CTRL9 + 1, SX9324_REG_PROX_CTRL0 - 1),
318 regmap_reg_range(SX9324_REG_PROX_CTRL7 + 1, SX9324_REG_ADV_CTRL0 - 1),
319 regmap_reg_range(SX9324_REG_ADV_CTRL20 + 1, SX9324_REG_PHASE_SEL - 1),
320 regmap_reg_range(SX9324_REG_SAR_LSB + 1, SX9324_REG_RESET - 1),
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/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
27 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
26 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
/linux-6.12.1/drivers/pinctrl/tegra/
Dpinctrl-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
14 #include <linux/clk-provider.h>
21 #include "pinctrl-tegra.h"
254 /* All non-GPIO pins follow */
412 PINCTRL_PIN(TEGRA_PIN_GMI_AD10_PH2, "GMI_AD10 PH2"),
1967 /* Pin group with mux control, and typically tri-state and pull-up/down too */
1980 .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \
1983 .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \
1986 .tri_reg = ((tri_r) - TRISTATE_REG_A), \
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