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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
7 title: PDC interrupt controller
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
20 controller PDC is next in hierarchy, followed by others. Drivers requiring
21 wakeup capabilities of their device interrupts routed through the PDC, must
22 specify PDC as their interrupt controller and request the PDC port associated
29 - qcom,qdu1000-pdc
30 - qcom,sa8255p-pdc
31 - qcom,sa8775p-pdc
32 - qcom,sc7180-pdc
[all …]
Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
54 pdc: pdc@02006000 {
65 compatible = "img,pdc-intc";
82 * An SoC peripheral that is wired through the PDC.
86 interrupt-parent = <&pdc>;
[all …]
/linux-6.12.1/arch/parisc/kernel/
Dprocessor.c28 #include <asm/pdc.h>
57 ** The code path not shared is how PDC hands control of the CPU to the OS.
104 txn_addr = dev->hpa.start; /* for legacy PDC */ in processor_probe()
143 * We'll care when we need to query PAT PDC about a CPU *after* in processor_probe()
242 #define p ((unsigned long *)&boot_cpu_data.pdc.model) in collect_boot_cpu_data()
243 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) { in collect_boot_cpu_data()
248 add_device_randomness(&boot_cpu_data.pdc.model, in collect_boot_cpu_data()
249 sizeof(boot_cpu_data.pdc.model)); in collect_boot_cpu_data()
253 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) { in collect_boot_cpu_data()
255 boot_cpu_data.pdc.versions); in collect_boot_cpu_data()
[all …]
Dpacache.S10 * NOTE: fdc,fic, and pdc instructions that use base register modification
806 1: pdc,m r31(%r28)
807 pdc,m r31(%r28)
808 pdc,m r31(%r28)
809 pdc,m r31(%r28)
810 pdc,m r31(%r28)
811 pdc,m r31(%r28)
812 pdc,m r31(%r28)
813 pdc,m r31(%r28)
814 pdc,m r31(%r28)
[all …]
Dfirmware.c3 * arch/parisc/kernel/firmware.c - safe PDC access routines
5 * PDC == Processor Dependent Code
7 * See PDC documentation at
20 * guidelines when writing PDC wrappers:
22 * - the name of the pdc wrapper should match one of the macros
25 * - use the static PDC result buffers and "copyout" to structs
27 * - hold pdc_lock while in PDC or using static result buffers
30 * - the name of the struct used for pdc return values should equal
32 * corresponding PDC call
64 #include <asm/pdc.h>
[all …]
Dpdc_chassis.c3 * interfaces to Chassis Codes via PDC (firmware)
32 #include <asm/pdc.h>
87 * As soon as a panic occurs, we should inform the PDC.
110 * As soon as a reboot occurs, we should inform the PDC.
159 * Only machines with 64 bits PDC PAT and those reported in
162 * returns 0 if no error, -1 if no supported PDC is present or invalid message,
163 * else returns the appropriate PDC error code.
281 printk(KERN_INFO "Enabling PDC chassis warnings support v%s\n", in pdc_chassis_create_procfs()
Dinventory.c26 #include <asm/pdc.h>
35 ** DEBUG_PAT Dump details which PDC PAT provides about ranges/devices.
58 /* Determine the pdc "type" used on this machine */ in setup_pdc()
60 printk(KERN_INFO "Determining PDC firmware type: "); in setup_pdc()
71 * is a pdc pat box, or it is an older box. All 64 bit capable in setup_pdc()
72 * machines are either pdc pat boxes or they support PDC_SYSTEM_MAP. in setup_pdc()
127 #define PDC_PAGE_ADJ_SHIFT (PAGE_SHIFT - 12) /* pdc pages are always 4k */
137 * pdc info is bad in this case). in set_pmem_entry()
174 /* All of the PDC PAT specific code is 64-bit only */
193 long status; /* PDC return value status */ in pat_query_module()
[all …]
Dpdc_cons.c3 * PDC early console support - use PDC firmware to dump text via boot console
13 #include <asm/pdc.h> /* for iodc_call() proto and friends */
65 EARLYCON_DECLARE(pdc, pdc_earlycon_setup);
Dprocess.c47 #include <asm/pdc.h>
59 ** the system. An HVERSION dependent PDC call was developed
65 ** issued. Obviously, if the PDC does implement PDC_BROADCAST_RESET
66 ** the PDC call will not return (the system will be reset).
151 * Detect when running on QEMU with SeaBIOS PDC Firmware and let
175 /* Let PDC firmware put CPU into firmware idle loop. */ in arch_cpu_idle_dead()
178 pr_warn("PDC does not provide rendezvous function.\n"); in arch_cpu_idle_dead()
/linux-6.12.1/sound/soc/atmel/
Datmel-pcm.h32 unsigned int xpr; /* PDC recv/trans pointer */
33 unsigned int xcr; /* PDC recv/trans counter */
34 unsigned int xnpr; /* PDC next recv/trans pointer */
35 unsigned int xncr; /* PDC next recv/trans counter */
36 unsigned int ptcr; /* PDC transfer control */
45 u32 pdc_enable; /* PDC recv/trans enable */
46 u32 pdc_disable; /* PDC recv/trans disable */
52 * PDC DMA operation. All fields except dma_intr_handler() are initialized
59 int pdc_xfer_size; /* PDC counter increment in bytes */
61 struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */ member
[all …]
Datmel-pcm-pdc.c103 /* re-start the PDC */ in atmel_pcm_dma_irq()
110 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_dma_irq()
112 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_dma_irq()
119 /* Load the PDC next pointer and counter registers */ in atmel_pcm_dma_irq()
124 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_dma_irq()
126 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_dma_irq()
208 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_trigger()
210 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_trigger()
214 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_trigger()
216 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_trigger()
[all …]
DMakefile3 snd-soc-atmel-pcm-pdc-y := atmel-pcm-pdc.o
12 # pdc and dma need to both be built-in if any user of
15 obj-$(CONFIG_SND_ATMEL_SOC_SSC) += snd-soc-atmel-pcm-pdc.o
/linux-6.12.1/drivers/mailbox/
Dbcm-pdc-mailbox.c7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
20 * The PDC driver allows multiple messages to be pending in the descriptor
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
19 compatible = "brcm,iproc-pdc-mbox";
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/linux-6.12.1/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
21 - const: qcom,sc7180-pdc-global
22 - const: qcom,sdm845-pdc-global
26 - const: qcom,sc7280-pdc-global
30 - const: qcom,sdm845-pdc-global
48 compatible = "qcom,sdm845-pdc-global";
/linux-6.12.1/drivers/irqchip/
Dqcom-pdc.c36 /* Notable PDC versions */
106 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
128 * qcom_pdc_gic_set_type: Configure PDC for the interrupt
133 * If @type is edge triggered, forward that as Rising edge as PDC
135 * If @type is level, then forward that as level high as PDC
177 * When we change types the PDC can give a phantom interrupt. in qcom_pdc_gic_set_type()
192 .name = "PDC",
275 n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); in pdc_setup_pin_mapping()
287 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
292 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
[all …]
Dirq-imgpdc.c3 * IMG PowerDown Controller (PDC)
7 * Exposes the syswake and PDC peripheral wake interrupts to the system.
20 /* PDC interrupt register numbers */
31 /* PDC interrupt register field masks */
56 /* PDC interrupt constants */
66 * struct pdc_intc_priv - private pdc interrupt data.
70 * @syswake_irq: Shared PDC syswake IRQ number.
71 * @domain: IRQ domain for PDC peripheral and syswake IRQs.
72 * @pdc_base: Base of PDC registers.
74 * @lock: Lock to protect the PDC syswake registers and the cached
[all …]
/linux-6.12.1/include/linux/
Datmel-ssc.h276 /* SSC PDC Receive Pointer Register */
279 /* SSC PDC Receive Counter Register */
282 /* SSC PDC Transmit Pointer Register */
285 /* SSC PDC Receive Next Pointer Register */
288 /* SSC PDC Receive Next Counter Register */
291 /* SSC PDC Transmit Counter Register */
294 /* SSC PDC Transmit Next Pointer Register */
297 /* SSC PDC Transmit Next Counter Register */
300 /* SSC PDC Transfer Control Register */
311 /* SSC PDC Transfer Status Register */
/linux-6.12.1/drivers/tty/serial/
Datmel_serial.c121 bool use_pdc_rx; /* enable PDC receiver */
122 short pdc_rx_idx; /* current PDC RX buffer */
123 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
126 bool use_pdc_tx; /* enable PDC transmitter */
127 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
560 /* disable PDC transmit */ in atmel_stop_tx()
601 /* re-enable PDC transmit */ in atmel_start_tx()
626 /* enable PDC controller */ in atmel_start_rx()
644 /* disable PDC receive */ in atmel_stop_rx()
1290 * PDC receive. Just schedule the tasklet and let it in atmel_handle_receive()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dimg,pdc-wdt.yaml4 $id: http://devicetree.org/schemas/watchdog/img,pdc-wdt.yaml#
7 title: ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
18 - img,pdc-wdt
50 compatible = "img,pdc-wdt";
/linux-6.12.1/Documentation/devicetree/bindings/display/msm/
Dgmu.yaml101 - description: GMU PDC registers
102 - description: GMU PDC sequence registers
134 - description: GMU PDC registers
170 - description: GMU PDC registers
171 - description: GMU PDC sequence registers
190 - description: GMU PDC registers
191 - description: GMU PDC sequence registers
238 - description: GMU PDC registers
/linux-6.12.1/arch/parisc/include/asm/
Dpdcpat.h63 /* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
70 /* PDC PAT COMPLEX */
74 /* PDC PAT CPU -- CPU configuration within the protection domain */
86 #define PDC_PAT_CPU_GET_PDC_ENTRYPOINT 11L /* Return PDC Entry point */
90 /* PDC PAT EVENT -- Platform Events */
99 /* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
105 #define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
114 /* PDC PAT IO -- On-line services for I/O modules */
144 /* PDC PAT MEM -- Manage memory page deallocation */
169 /* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
[all …]
Dpdc.h5 #include <uapi/asm/pdc.h>
14 extern unsigned long parisc_pat_pdc_cap; /* PDC capabilities (PAT) */
18 #define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
24 /* wrapper-functions from pdc.c */
/linux-6.12.1/drivers/reset/
Dreset-qcom-pdc.c12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
34 .name = "pdc-reset",
146 { .compatible = "qcom,sc7280-pdc-global", .data = &sc7280_pdc_reset_desc },
147 { .compatible = "qcom,sdm845-pdc-global", .data = &sdm845_pdc_reset_desc },
161 MODULE_DESCRIPTION("Qualcomm PDC Reset Driver");
/linux-6.12.1/drivers/parisc/
Dled.c33 #include <asm/pdc.h>
394 * Only PDC-based, LASI- or ASP-style LEDs and LCDs are supported.
449 * PDC for an usable chassis LCD or LED. If the PDC doesn't return any
451 * KittyHawk machines have often a buggy PDC, so that we explicitly check
464 /* Work around the buggy PDC of KittyHawk-machines */ in early_led_init()
488 /* check the results. Some machines have a buggy PDC */ in early_led_init()
498 /* PDC tells LCD should not be used. */ in early_led_init()
512 pr_warn("PDC reported unknown LCD/LED model %d\n", in early_led_init()

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