Searched full:pclk0 (Results 1 – 5 of 5) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | fsl,imx8qm-hsio.yaml | 102 - const: pclk0
120 - const: pclk0
158 clock-names = "pclk0", "apb_pclk0", "phy0_crr", "ctl0_crr", "misc_crr";
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| /linux-6.12.1/drivers/clk/nuvoton/ |
| D | clk-ma35d1.c | 116 { .fw_name = "pclk0", },
127 { .fw_name = "pclk0", },
182 { .fw_name = "pclk0", },
193 { .fw_name = "pclk0", },
313 { .fw_name = "pclk0", },
318 { .fw_name = "pclk0", },
535 /* HCLK0~3 & PCLK0~4 */ in ma35d1_clocks_probe()
539 hws[PCLK0] = ma35d1_clk_fixed_factor(dev, "pclk0", "sysclk1_mux", 1, 1); in ma35d1_clocks_probe()
908 hws[I2C0_GATE] = ma35d1_clk_gate(dev, "i2c0_gate", "pclk0", in ma35d1_clocks_probe()
914 hws[I2C3_GATE] = ma35d1_clk_gate(dev, "i2c3_gate", "pclk0", in ma35d1_clocks_probe()
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | nuvoton,ma35d1-clk.h | 40 #define PCLK0 27 macro
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| /linux-6.12.1/drivers/clk/mvebu/ |
| D | armada-38x.c | 20 * SAR[14:10] : Ratios between PCLK0, NBCLK, HCLK and DRAM clocks
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| /linux-6.12.1/drivers/phy/freescale/ |
| D | phy-fsl-imx8qm-hsio.c | 99 static const char * const lan0_pcie_clks[] = {"apb_pclk0", "pclk0", "ctl0_crr",
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