Searched +full:pciea +full:- +full:x2 +full:- +full:pcieb (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-hsio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Richard Zhu <hongxing.zhu@nxp.com>15 - fsl,imx8qm-hsio16 - fsl,imx8qxp-hsio19 - description: Base address and length of the PHY block20 - description: HSIO control and status registers(CSR) of the PHY21 - description: HSIO CSR of the controller bound to the PHY[all …]
1 // SPDX-License-Identifier: GPL-2.0+19 #include <dt-bindings/phy/phy.h>20 #include <dt-bindings/phy/phy-imx8-pcie.h>120 struct imx_hsio_priv *priv = lane->priv; in imx_hsio_init()121 struct device *dev = priv->dev; in imx_hsio_init()124 switch (lane->phy_type) { in imx_hsio_init()126 lane->phy_mode = PHY_MODE_PCIE; in imx_hsio_init()127 if (lane->ctrl_index == 0) { /* PCIEA */ in imx_hsio_init()128 lane->ctrl_off = 0; in imx_hsio_init()129 lane->phy_off = 0; in imx_hsio_init()[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/axg-aoclkc.h>7 #include <dt-bindings/clock/axg-audio-clkc.h>8 #include <dt-bindings/clock/axg-clkc.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/gpio/meson-axg-gpio.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>[all …]