Searched full:pcie_0_pipe_clk_src (Results 1 – 12 of 12) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | qcom,gcc-qcs404.yaml | 36 - const: pcie_0_pipe_clk_src
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D | qcom,gcc-msm8996.yaml | 43 - const: pcie_0_pipe_clk_src
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | qcom,msm8998-qmp-pcie-phy.yaml | 87 clock-output-names = "pcie_0_pipe_clk_src";
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D | qcom,msm8996-qmp-pcie-phy.yaml | 157 clock-output-names = "pcie_0_pipe_clk_src";
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/linux-6.12.1/include/dt-bindings/clock/ |
D | qcom,gcc-msm8994.h | 56 #define PCIE_0_PIPE_CLK_SRC 46 macro
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D | qcom,gcc-apq8084.h | 329 #define PCIE_0_PIPE_CLK_SRC 320 macro
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/linux-6.12.1/drivers/clk/qcom/ |
D | gcc-msm8994.c | 880 static struct clk_rcg2 pcie_0_pipe_clk_src = { variable 885 .name = "pcie_0_pipe_clk_src", 1795 .parent_hws = (const struct clk_hw *[]){ &pcie_0_pipe_clk_src.clkr.hw }, 2502 [PCIE_0_PIPE_CLK_SRC] = &pcie_0_pipe_clk_src.clkr,
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D | gcc-qcs404.c | 949 static struct clk_rcg2 pcie_0_pipe_clk_src = { variable 956 .name = "pcie_0_pipe_clk_src", 2144 &pcie_0_pipe_clk_src.clkr.hw, 2726 [GCC_PCIE_0_PIPE_CLK_SRC] = &pcie_0_pipe_clk_src.clkr,
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D | gcc-apq8084.c | 1019 static struct clk_rcg2 pcie_0_pipe_clk_src = { variable 1025 .name = "pcie_0_pipe_clk_src", 2359 .hw = &pcie_0_pipe_clk_src.clkr.hw, 3361 [PCIE_0_PIPE_CLK_SRC] = &pcie_0_pipe_clk_src.clkr,
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D | gcc-msm8996.c | 2454 .fw_name = "pcie_0_pipe_clk_src", .name = "pcie_0_pipe_clk_src",
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | msm8996.dtsi | 710 clock-output-names = "pcie_0_pipe_clk_src"; 802 "pcie_0_pipe_clk_src",
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D | msm8998.dtsi | 982 clock-output-names = "pcie_0_pipe_clk_src";
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