/linux-6.12.1/drivers/clk/at91/ |
D | sckc.c | 70 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_prepare() local 71 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_prepare() 74 if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en)) in clk_slow_osc_prepare() 77 writel(tmp | osc->bits->cr_osc32en, sckcr); in clk_slow_osc_prepare() 80 udelay(osc->startup_usec); in clk_slow_osc_prepare() 82 usleep_range(osc->startup_usec, osc->startup_usec + 1); in clk_slow_osc_prepare() 89 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_unprepare() local 90 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_unprepare() 93 if (tmp & osc->bits->cr_osc32byp) in clk_slow_osc_unprepare() 96 writel(tmp & ~osc->bits->cr_osc32en, sckcr); in clk_slow_osc_unprepare() [all …]
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D | clk-main.c | 73 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_prepare() local 74 struct regmap *regmap = osc->regmap; in clk_main_osc_prepare() 96 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_unprepare() local 97 struct regmap *regmap = osc->regmap; in clk_main_osc_unprepare() 113 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_is_prepared() local 114 struct regmap *regmap = osc->regmap; in clk_main_osc_is_prepared() 128 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_save_context() local 130 osc->pms.status = clk_main_osc_is_prepared(hw); in clk_main_osc_save_context() 137 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_restore_context() local 139 if (osc->pms.status) in clk_main_osc_restore_context() [all …]
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/linux-6.12.1/drivers/clk/versatile/ |
D | clk-vexpress-osc.c | 23 #define to_vexpress_osc(osc) container_of(osc, struct vexpress_osc, hw) argument 28 struct vexpress_osc *osc = to_vexpress_osc(hw); in vexpress_osc_recalc_rate() local 31 regmap_read(osc->reg, 0, &rate); in vexpress_osc_recalc_rate() 39 struct vexpress_osc *osc = to_vexpress_osc(hw); in vexpress_osc_round_rate() local 41 if (osc->rate_min && rate < osc->rate_min) in vexpress_osc_round_rate() 42 rate = osc->rate_min; in vexpress_osc_round_rate() 44 if (osc->rate_max && rate > osc->rate_max) in vexpress_osc_round_rate() 45 rate = osc->rate_max; in vexpress_osc_round_rate() 53 struct vexpress_osc *osc = to_vexpress_osc(hw); in vexpress_osc_set_rate() local 55 return regmap_write(osc->reg, 0, rate); in vexpress_osc_set_rate() [all …]
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/linux-6.12.1/drivers/clk/imx/ |
D | clk-imx7d.c | 44 static const char *arm_a7_sel[] = { "osc", "pll_arm_main_clk", 49 static const char *arm_m4_sel[] = { "osc", "pll_sys_main_240m_clk", 54 static const char *axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk", 58 static const char *disp_axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk", 62 static const char *enet_axi_sel[] = { "osc", "pll_sys_pfd2_270m_clk", 67 static const char *nand_usdhc_bus_sel[] = { "osc", "pll_sys_pfd2_270m_clk", 72 static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_270m_clk", 83 static const char *dram_phym_alt_sel[] = { "osc", "pll_dram_533m_clk", 88 static const char *dram_alt_sel[] = { "osc", "pll_dram_533m_clk", 93 static const char *usb_hsic_sel[] = { "osc", "pll_sys_main_clk", [all …]
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D | clk-imx5.c | 66 static const char *lp_apm_sel[] = { "osc", }; 82 static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", }; 83 static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", }; 84 static const char *mx53_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "di_pll4_podf", "dummy", "ldb_… 86 static const char *mx51_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", }; 87 static const char *mx53_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", "ldb_di1_… 89 static const char *mx51_tve_ext_sel[] = { "osc", "ckih1", }; 110 "osc", "ckih1", 119 static const char *mx51_spdif_xtal_sel[] = { "osc", "ckih", "ckih2", }; 120 static const char *mx53_spdif_xtal_sel[] = { "osc", "ckih", "ckih2", "pll4_sw", }; [all …]
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D | clk-imx6sl.c | 34 static const char *step_sels[] = { "osc", "pll2_pfd2", }; 39 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", }; 43 static const char *csi_sels[] = { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", }; 47 static const char *perclk_sels[] = { "ipg", "osc", }; 55 static const char *ecspi_sels[] = { "pll3_60m", "osc", }; 56 static const char *uart_sels[] = { "pll3_80m", "osc", }; 60 "pll3_pfd2", "pll3_pfd3", "osc", "dummy", "dummy", "dummy", "dummy", "dummy", 63 static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", }; 198 hws[IMX6SL_CLK_OSC] = imx_obtain_fixed_clock_hw("osc", 0); in imx6sl_clocks_init() 217 hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f); in imx6sl_clocks_init() [all …]
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/linux-6.12.1/drivers/clk/tegra/ |
D | clk-tegra-fixed.c | 30 struct clk *clk, *osc; in tegra_osc_clk_init() local 53 osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq); in tegra_osc_clk_init() 54 *dt_clk = osc; in tegra_osc_clk_init() 59 clk = clk_register_fixed_factor(NULL, "osc_div2", "osc", in tegra_osc_clk_init() 67 clk = clk_register_fixed_factor(NULL, "osc_div4", "osc", in tegra_osc_clk_init() 76 clk = clk_register_fixed_factor(NULL, "clk_m", "osc", in tegra_osc_clk_init() 87 clk = clk_register_fixed_factor(NULL, "pll_ref", "osc", in tegra_osc_clk_init()
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/linux-6.12.1/arch/arm64/boot/dts/broadcom/stingray/ |
D | stingray-clock.dtsi | 35 osc: oscillator { label 44 clocks = <&osc>; 54 clocks = <&osc>; 66 clocks = <&osc>; 78 clocks = <&osc>; 88 clocks = <&osc>; 100 clocks = <&osc>; 110 clocks = <&osc>; 121 clocks = <&osc>;
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | imx7d-clock.yaml | 34 - description: 32k osc 35 - description: 24m osc 40 - const: osc 62 clocks = <&ckil>, <&osc>; 63 clock-names = "ckil", "osc";
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D | imx6ul-clock.yaml | 33 - description: 32k osc 34 - description: 24m osc 41 - const: osc 66 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>; 67 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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D | imx6sll-clock.yaml | 33 - description: 32k osc 34 - description: 24m osc 41 - const: osc 66 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>; 67 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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D | imx6sx-clock.yaml | 33 - description: 32k osc 34 - description: 24m osc 43 - const: osc 70 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>; 71 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
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D | imxrt1050-clock.yaml | 29 description: 24m osc 33 const: osc 56 clocks = <&osc>; 57 clock-names = "osc";
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D | imx8m-clock.yaml | 63 - description: 32k osc 64 - description: 25m osc 65 - description: 27m osc 83 - description: 32k osc 84 - description: 24m osc
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D | starfive,jh7110-aoncrg.yaml | 49 - const: osc 60 - const: osc 95 clocks = <&osc>, <&gmac0_rmii_refin>, 101 clock-names = "osc", "gmac0_rmii_refin",
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D | starfive,jh7110-syscrg.yaml | 51 - const: osc 66 - const: osc 104 clocks = <&osc>, <&gmac1_rmii_refin>, 110 clock-names = "osc", "gmac1_rmii_refin",
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D | allwinner,sun4i-a10-osc-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-osc-clk.yaml# 20 const: allwinner,sun4i-a10-osc-clk 45 compatible = "allwinner,sun4i-a10-osc-clk";
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/linux-6.12.1/arch/arm/boot/dts/broadcom/ |
D | bcm-cygnus-clock.dtsi | 38 osc: oscillator { label 48 clocks = <&osc>; 74 clocks = <&osc>; 101 clocks = <&osc>; 110 clocks = <&osc>; 121 clocks = <&osc>; 129 clocks = <&osc>;
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/linux-6.12.1/drivers/clocksource/ |
D | timer-tegra186.c | 90 struct clocksource osc; member 333 osc); in tegra186_timer_osc_read() 340 tegra->osc.name = "osc"; in tegra186_timer_osc_init() 341 tegra->osc.rating = 300; in tegra186_timer_osc_init() 342 tegra->osc.read = tegra186_timer_osc_read; in tegra186_timer_osc_init() 343 tegra->osc.mask = CLOCKSOURCE_MASK(32); in tegra186_timer_osc_init() 344 tegra->osc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in tegra186_timer_osc_init() 346 return clocksource_register_hz(&tegra->osc, 38400000); in tegra186_timer_osc_init() 421 dev_err(dev, "failed to register OSC counter: %d\n", err); in tegra186_timer_probe() 443 clocksource_unregister(&tegra->osc); in tegra186_timer_probe() [all …]
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/linux-6.12.1/arch/arm64/boot/dts/broadcom/northstar2/ |
D | ns2-clock.dtsi | 35 osc: oscillator { label 47 clocks = <&osc>; 60 clocks = <&osc>; 74 clocks = <&osc>; 102 clocks = <&osc>;
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/linux-6.12.1/arch/xtensa/boot/dts/ |
D | xtfpga.dtsi | 23 clocks = <&osc>; 51 osc: main-oscillator { label 66 clocks = <&osc>; 75 clocks = <&osc>; 95 clocks = <&osc>;
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D | csp.dts | 35 osc: main-oscillator { label 49 clocks = <&osc>, <&osc>;
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/linux-6.12.1/drivers/net/can/spi/mcp251xfd/ |
D | mcp251xfd-core.c | 125 mcp251xfd_get_osc_str(const u32 osc, const u32 osc_reference) in mcp251xfd_get_osc_str() argument 127 switch (~osc & osc_reference & in mcp251xfd_get_osc_str() 232 u32 con = 0, con_reqop, osc = 0; in __mcp251xfd_chip_set_mode() local 267 regmap_read(priv->map_reg, MCP251XFD_REG_OSC, &osc); in __mcp251xfd_chip_set_mode() 271 "Failed to read CAN Control Register (con=0x%08x, osc=0x%08x).\n", in __mcp251xfd_chip_set_mode() 272 con, osc); in __mcp251xfd_chip_set_mode() 279 …"Controller failed to enter mode %s Mode (%u) and stays in %s Mode (%u) (con=0x%08x, osc=0x%08x).\… in __mcp251xfd_chip_set_mode() 282 con, osc); in __mcp251xfd_chip_set_mode() 305 u32 osc; in mcp251xfd_chip_wait_for_osc_ready() local 308 err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_OSC, osc, in mcp251xfd_chip_wait_for_osc_ready() [all …]
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/linux-6.12.1/arch/arm/boot/dts/arm/ |
D | vexpress-v2p-ca5s.dts | 150 compatible = "arm,vexpress-osc"; 159 compatible = "arm,vexpress-osc"; 168 compatible = "arm,vexpress-osc"; 177 compatible = "arm,vexpress-osc"; 186 compatible = "arm,vexpress-osc"; 195 compatible = "arm,vexpress-osc";
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D | vexpress-v2p-ca15-tc1.dts | 147 compatible = "arm,vexpress-osc"; 156 compatible = "arm,vexpress-osc"; 165 compatible = "arm,vexpress-osc"; 174 compatible = "arm,vexpress-osc"; 183 compatible = "arm,vexpress-osc"; 192 compatible = "arm,vexpress-osc";
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