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/linux-6.12.1/Documentation/devicetree/bindings/opp/
Dallwinner,sun50i-h6-operating-points.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner H6 CPU OPP
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 OPP varies based on the silicon variant in use. Allwinner Process
20 - $ref: opp-v2-base.yaml#
25 - allwinner,sun50i-h6-operating-points
[all …]
Doperating-points-v2-ti-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI CPU OPP (Operating Performance Points)
12 OPP vary based on the silicon variant used. The data sheet sections
14 and voltage values based on device type and speed bin information
18 This document extends the operating-points-v2 binding by providing
22 - Dhruva Gole <d-gole@ti.com>
25 - $ref: opp-v2-base.yaml#
[all …]
Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
23 the OPP framework with required information (existing HW bitmap).
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/cpufreq/
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
5 "speed grading" value which are written in fuses. These bits are combined with
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Domap36xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
21 operating-points-v2 = <&cpu0_opp_table>;
23 vbb-supply = <&abb_mpu_iva>;
24 clock-latency = <300000>; /* From omap-cpufreq driver */
25 #cooling-cells = <2>;
29 cpu0_opp_table: opp-table {
30 compatible = "operating-points-v2-ti-cpu";
[all …]
Domap34xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
16 /* OMAP343x/OMAP35xx variants OPP1-6 */
17 operating-points-v2 = <&cpu0_opp_table>;
19 clock-latency = <300000>; /* From legacy driver */
20 #cooling-cells = <2>;
24 cpu0_opp_table: opp-table {
25 compatible = "operating-points-v2-ti-cpu";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mn-overdrive.dtsi"
16 compatible = "mmc-pwrseq-simple";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
21 clock-names = "ext_clock";
22 post-power-on-delay-ms = <80>;
32 cpu-supply = <&buck2_reg>;
36 cpu-supply = <&buck2_reg>;
[all …]
Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mm-overdrive.dtsi"
15 compatible = "mmc-pwrseq-simple";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
18 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
20 clock-names = "ext_clock";
21 post-power-on-delay-ms = <80>;
31 cpu-supply = <&buck2_reg>;
35 cpu-supply = <&buck2_reg>;
[all …]
Dimx8mm-venice-gw7901.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
30 stdout-path = &uart2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
18 chassis-type = "handset";
20 backlight_dsi: backlight-dsi {
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/gpu/
Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
18 - items:
19 - enum:
20 - amlogic,meson-g12a-mali
21 - mediatek,mt8183-mali
[all …]
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cells = <&fuse_grade>;
22 nvmem-cell-names = "speed_grade";
26 compatible = "arm,cortex-a7";
29 clock-frequency = <996000000>;
30 operating-points-v2 = <&cpu0_opp_table>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
[all …]
Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
16 chassis-type = "convertible";
33 * pre-existing /chosen node to be available to insert the
[all …]
Dtegra30-pegatron-chagall.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
16 chassis-type = "tablet";
35 * pre-existing /chosen node to be available to insert the
[all …]
Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
32 * pre-existing /chosen node to be available to insert the
41 reserved-memory {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
[all …]
Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
11 #include <dt-bindings/interconnect/qcom,ipq9574.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/renesas/
Dr8a779f0.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC
8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779f0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 cluster01_opp: opp-table-0 {
18 compatible = "operating-points-v2";
19 opp-shared;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
[all …]
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: ppvar-sys {
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun8i-v40-bananapi-m2-berry.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun8i-r40.dtsi"
45 #include "sun8i-r40-cpu-opp.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
51 compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
59 stdout-path = "serial0:115200n8";
63 compatible = "hdmi-connector";
68 remote-endpoint = <&hdmi_out_con>;
74 compatible = "gpio-leds";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h64-remix-mini-pc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "jide,remix-mini-pc", "allwinner,sun50i-h64",
14 "allwinner,sun50i-a64";
22 stdout-path = "serial0:115200n8";
25 hdmi-connector {
26 compatible = "hdmi-connector";
[all …]

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