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/linux-6.12.1/Documentation/userspace-api/media/cec/
Dcec-pin-error-inj.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
9 has low-level support for the CEC bus. Most hardware today will have
10 high-level CEC support where the hardware deals with driving the CEC bus,
19 Currently only the cec-gpio driver (when the CEC line is directly
20 connected to a pull-up GPIO line) and the AllWinner A10/A20 drm driver
25 now an ``error-inj`` file.
32 With ``cat error-inj`` you can see both the possible commands and the current
35 $ cat /sys/kernel/debug/cec/cec0/error-inj
38 # rx-clear clear all rx error injections
39 # tx-clear clear all tx error injections
[all …]
/linux-6.12.1/drivers/crypto/allwinner/sun4i-ss/
Dsun4i-ss-cipher.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sun4i-ss-cipher.c - hardware cryptographic accelerator for Allwinner A20 SoC
5 * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>
8 * keysize in CBC and ECB mode.
9 * Add support also for DES and 3DES in CBC and ECB mode.
13 #include "sun4i-ss.h"
18 struct sun4i_tfm_ctx *op = crypto_skcipher_ctx(tfm); in sun4i_ss_opti_poll() local
19 struct sun4i_ss_ctx *ss = op->ss; in sun4i_ss_opti_poll()
22 u32 mode = ctx->mode; in sun4i_ss_opti_poll() local
30 unsigned int ileft = areq->cryptlen; in sun4i_ss_opti_poll()
[all …]
Dsun4i-ss-hash.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sun4i-ss-hash.c - hardware cryptographic accelerator for Allwinner A20 SoC
5 * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>
11 #include "sun4i-ss.h"
20 struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); in sun4i_hash_crainit() local
21 struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); in sun4i_hash_crainit()
25 memset(op, 0, sizeof(struct sun4i_tfm_ctx)); in sun4i_hash_crainit()
28 op->ss = algt->ss; in sun4i_hash_crainit()
30 err = pm_runtime_resume_and_get(op->ss->dev); in sun4i_hash_crainit()
41 struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); in sun4i_hash_craexit() local
[all …]
/linux-6.12.1/drivers/media/cec/core/
Dcec-pin-error-inj.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <media/cec-pin.h>
11 #include "cec-pin-priv.h"
20 { CEC_ERROR_INJ_RX_NACK_OFFSET, -1, "rx-nack" },
22 CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, "rx-low-drive" },
23 { CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, "rx-add-byte" },
24 { CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, "rx-remove-byte" },
26 CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, "rx-arb-lost" },
28 { CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, "tx-no-eom" },
29 { CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, "tx-early-eom" },
[all …]
/linux-6.12.1/drivers/spi/
Dspi-sn-f-ospi.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/spi/spi-mem.h>
117 static u32 f_ospi_get_dummy_cycle(const struct spi_mem_op *op) in f_ospi_get_dummy_cycle() argument
119 return (op->dummy.nbytes * 8) / op->dummy.buswidth; in f_ospi_get_dummy_cycle()
125 ospi->base + OSPI_IRQ); in f_ospi_clear_irq()
132 val = readl(ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_enable_irq_status()
134 writel(val, ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_enable_irq_status()
141 val = readl(ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_disable_irq_status()
143 writel(val, ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_disable_irq_status()
150 val = readl(ospi->base + OSPI_IRQ_SIG_EN); in f_ospi_disable_irq_output()
[all …]
Datmel-quadspi.c1 // SPDX-License-Identifier: GPL-2.0
11 * This driver is based on drivers/mtd/spi-nor/fsl-quadspi.c from Freescale.
25 #include <linux/spi/spi-mem.h>
29 #define QSPI_MR 0x0004 /* Mode Register */
44 #define QSPI_SMR 0x0040 /* Scrambling Mode Register */
47 #define QSPI_WPMR 0x00E4 /* Write Protection Mode Register */
59 /* Bitfields in QSPI_MR (Mode Register) */
69 #define QSPI_MR_NBBITS(n) ((((n) - 8) << 8) & QSPI_MR_NBBITS_MASK)
127 /* Bitfields in QSPI_SMR (Scrambling Mode Register) */
131 /* Bitfields in QSPI_WPMR (Write Protection Mode Register) */
[all …]
Dspi-hisi-sfc-v3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/spi/spi-mem.h>
48 /* IO Mode definition in HISI_SFC_V3XX_CMD_CFG */
58 * The IO modes lookup table. hisi_sfc_v3xx_io_modes[(z - 1) / 2][y / 2][x / 2]
59 * stands for x-y-z mode, as described in SFDP terminology. -EIO indicates
60 * an invalid mode.
65 { HISI_SFC_V3XX_DIO, HISI_SFC_V3XX_FULL_DIO, -EIO },
66 { -EIO, -EIO, -EIO },
70 { -EIO, -EIO, -EIO },
71 { HISI_SFC_V3XX_QIO, -EIO, HISI_SFC_V3XX_FULL_QIO },
[all …]
Dspi-amlogic-spifc-a1.c1 // SPDX-License-Identifier: GPL-2.0
21 #include <linux/spi/spi-mem.h>
80 #define SPIFC_A1_USER_CMD(op) ( \ argument
82 FIELD_PREP(SPIFC_A1_USER_CMD_CODE, (op)->cmd.opcode) | \
83 FIELD_PREP(SPIFC_A1_USER_CMD_MODE, ilog2((op)->cmd.buswidth)))
85 #define SPIFC_A1_USER_ADDR(op) ( \ argument
87 FIELD_PREP(SPIFC_A1_USER_ADDR_MODE, ilog2((op)->addr.buswidth)) | \
88 FIELD_PREP(SPIFC_A1_USER_ADDR_BYTES, (op)->addr.nbytes - 1))
90 #define SPIFC_A1_USER_DUMMY(op) ( \ argument
92 FIELD_PREP(SPIFC_A1_USER_DUMMY_MODE, ilog2((op)->dummy.buswidth)) | \
[all …]
Dspi-stm32-qspi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/dma-mapping.h>
23 #include <linux/spi/spi-mem.h>
93 #define STM32_AUTOSUSPEND_DELAY -1
134 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_irq()
135 sr = readl_relaxed(qspi->io_base + QSPI_SR); in stm32_qspi_irq()
140 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
141 complete(&qspi->match_completion); in stm32_qspi_irq()
149 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
[all …]
Dspi-zynq-qspi.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/spi/spi-mem.h>
28 #define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst, WO */
29 #define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst, WO */
30 #define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst, WO */
31 #define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst, WO */
48 #define ZYNQ_QSPI_CONFIG_MANSRTEN_MASK BIT(15) /* Enable Manual TX Mode */
54 #define ZYNQ_QSPI_CONFIG_MSTREN_MASK BIT(0) /* Master Mode */
57 * QSPI Configuration Register - Baud rate and target select
98 * linear mode also.
[all …]
Dspi-zynqmp-gqspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Xilinx Zynq UltraScale+ MPSoC Quad-SPI (QSPI) controller driver
4 * (host mode only)
6 * Copyright (C) 2009 - 2015 Xilinx, Inc.
11 #include <linux/dma-mapping.h>
13 #include <linux/firmware/xlnx-zynqmp.h>
23 #include <linux/spi/spi-mem.h>
120 #define GQSPI_TX_FIFO_FILL (GQSPI_TXD_DEPTH -\
161 * struct qspi_platform_data - zynqmp qspi platform data structure
169 * struct zynqmp_qspi - Defines qspi driver instance
[all …]
Dspi-mxic.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/mtd/nand-ecc-mxic.h>
20 #include <linux/spi/spi-mem.h>
74 #define OP_CMD_BYTES(x) (((x) - 1) << 13)
195 ret = clk_prepare_enable(mxic->send_clk); in mxic_spi_clk_enable()
199 ret = clk_prepare_enable(mxic->send_dly_clk); in mxic_spi_clk_enable()
206 clk_disable_unprepare(mxic->send_clk); in mxic_spi_clk_enable()
213 clk_disable_unprepare(mxic->send_clk); in mxic_spi_clk_disable()
214 clk_disable_unprepare(mxic->send_dly_clk); in mxic_spi_clk_disable()
223 mxic->regs + IDLY_CODE(0)); in mxic_spi_set_input_delay_dqs()
[all …]
Dspi-bcm-qspi.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #include <linux/mtd/spi-nor.h>
25 #include "spi-bcm-qspi.h"
63 /* Override mode masks */
171 * to TXRAM and RXRAM when used as 32-bit registers respectively
179 u8 mode; member
257 return qspi->bspi_mode; in has_bspi()
260 /* hardware supports spcr3 and fast baud-rate */
264 ((qspi->mspi_maj_rev >= 1) && in bcm_qspi_has_fastbr()
265 (qspi->mspi_min_rev >= 5))) in bcm_qspi_has_fastbr()
[all …]
/linux-6.12.1/arch/x86/xen/
Defi.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <xen/xen-ops.h>
19 #include "xen-ops.h"
49 struct xen_platform_op op = { in xen_efi_probe() local
56 union xenpf_efi_info *info = &op.u.firmware_info.u.efi_info; in xen_efi_probe()
58 if (!xen_initial_domain() || HYPERVISOR_platform_op(&op) < 0) in xen_efi_probe()
64 efi_systab_xen.tables = info->cfg.addr; in xen_efi_probe()
65 efi_systab_xen.nr_tables = info->cfg.nent; in xen_efi_probe()
67 op.cmd = XENPF_firmware_info; in xen_efi_probe()
68 op.u.firmware_info.type = XEN_FW_EFI_INFO; in xen_efi_probe()
[all …]
/linux-6.12.1/fs/afs/
Dinode.c36 pr_warn("kAFS: AFS vnode with undefined type %u\n", vnode->status.type); in dump_vnode()
38 vnode->status.abort_code, in dump_vnode()
39 vnode->status.mode, in dump_vnode()
40 vnode->status.size, in dump_vnode()
41 vnode->status.data_version); in dump_vnode()
43 vnode->fid.vid, in dump_vnode()
44 vnode->fid.vnode, in dump_vnode()
45 vnode->fid.unique); in dump_vnode()
48 parent_vnode->fid.vid, in dump_vnode()
49 parent_vnode->fid.vnode, in dump_vnode()
[all …]
/linux-6.12.1/lib/zlib_inflate/
Dinffast.c1 /* inffast.c -- fast decoding
2 * Copyright (C) 1995-2004 Mark Adler
33 available, an end-of-block is encountered, or a data error is encountered.
40 state->mode == LEN
41 strm->avail_in >= 6
42 strm->avail_out >= 258
43 start >= strm->avail_out
44 state->bits < 8
46 On return, state->mode is one of:
48 LEN -- ran out of enough output space or enough available input
[all …]
/linux-6.12.1/tools/crypto/tcrypt/
Dtcrypt_speed_compare.py2 # SPDX-License-Identifier: GPL-2.0
28 mode=211
31 lsmod | grep pcrypt && modprobe -r pcrypt
32 dmesg -C
34 modprobe tcrypt mode=${mode} sec=${sec} num_mb=${num_mb}
38 lsmod | grep pcrypt && modprobe -r pcrypt
39 dmesg -C
41 modprobe tcrypt mode=${mode} sec=${sec} num_mb=${num_mb}
43 lsmod | grep pcrypt && modprobe -r pcrypt
49 grep 'average' -A2 -B0 --group-separator="" ${seq_num}_compare.log
[all …]
/linux-6.12.1/drivers/ata/pata_parport/
Don20.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * (c) 1996-1998 Grant R. Guenther <grant@torque.net>
5 * on20.c is a low-level protocol driver for the
18 #define op(f) \ macro
33 * cont = 0 - access the IDE register file
34 * cont = 1 - access the IDE command set
43 op(1); vl(r); op(0); in on20_read_regr()
45 switch (pi->mode) { in on20_read_regr()
57 return -1; in on20_read_regr()
64 op(1); vl(r); in on20_write_regr()
[all …]
/linux-6.12.1/drivers/crypto/ccp/
Dccp-ops.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2019 Advanced Micro Devices, Inc.
11 #include <linux/dma-mapping.h>
19 #include "ccp-dev.h"
56 #define CCP_NEW_JOBID(ccp) ((ccp->vdata->version == CCP_VERSION(3, 0)) ? \
61 return atomic_inc_return(&ccp->current_id) & CCP_JOBID_MASK; in ccp_gen_jobid()
66 if (wa->dma_count) in ccp_sg_free()
67 dma_unmap_sg(wa->dma_dev, wa->dma_sg_head, wa->nents, wa->dma_dir); in ccp_sg_free()
69 wa->dma_count = 0; in ccp_sg_free()
78 wa->sg = sg; in ccp_init_sg_workarea()
[all …]
/linux-6.12.1/include/sound/
Dopl3.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Definitions of the OPL-3 registers.
9 * Hannu Savolainen 1993-1996
11 * The OPL-3 mode is switched on by writing 0x01, to the offset 5
15 * a bit mask defining which voices are used as 4 OP voices.
17 * The percussive mode is implemented in the left side only.
21 * A 4 OP voice can be created by setting the corresponding
25 * first voice on the right side to the 4 OP mode. The fourth
28 * If a voice is set to the 2 OP mode, it works like 2 OP modes
31 * even be left unconnected. This works with 4 OP voices also.
[all …]
/linux-6.12.1/arch/x86/kvm/
Demulate.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
9 * Linux coding style, mod r/m decoder, segment base fixes, real-mode
18 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
27 #include <asm/nospec-branch.h>
44 #define OpMem64 6ull /* Memory, 64-bit */
45 #define OpImmUByte 7ull /* Zero-extended 8-bit immediate */
48 #define OpImmByte 10ull /* 8-bit sign extended immediate */
50 #define OpImm 12ull /* Sign extended up to 32-bit immediate */
51 #define OpMem16 13ull /* Memory operand (16-bit). */
[all …]
/linux-6.12.1/drivers/video/fbdev/
Dcg14.c1 // SPDX-License-Identifier: GPL-2.0-only
98 u8 tms[2]; /* Test Mode Status Regs */
103 u32 tmr; /* Test Mode Read Back */
154 u8 mode; /* Mode Register */ member
169 * the screen in four parts, while operating in 24 bits mode. Each
197 int mode; member
203 struct cg14_regs __iomem *regs = par->regs; in __cg14_reset()
206 val = sbus_readb(&regs->mcr); in __cg14_reset()
208 sbus_writeb(val, &regs->mcr); in __cg14_reset()
213 struct cg14_par *par = (struct cg14_par *) info->par; in cg14_pan_display()
[all …]
/linux-6.12.1/Documentation/tee/
Dop-tee.rst1 .. SPDX-License-Identifier: GPL-2.0
4 OP-TEE (Open Portable Trusted Execution Environment)
7 The OP-TEE driver handles OP-TEE [1] based TEEs. Currently it is only the ARM
8 TrustZone based OP-TEE solution that is supported.
10 Lowest level of communication with OP-TEE builds on ARM SMC Calling
11 Convention (SMCCC) [2], which is the foundation for OP-TEE's SMC interface
12 [3] used internally by the driver. Stacked on top of that is OP-TEE Message
15 OP-TEE SMC interface provides the basic functions required by SMCCC and some
16 additional functions specific for OP-TEE. The most interesting functions are:
18 - OPTEE_SMC_FUNCID_CALLS_UID (part of SMCCC) returns the version information
[all …]
/linux-6.12.1/sound/soc/fsl/
Dmpc5200_psc_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // Freescale MPC5200 PSC in I2S mode
23 * This driver currently only supports the PSC running in I2S slave mode,
31 * PSC_I2S_FORMATS: audio formats supported by the PSC I2S mode
42 u32 mode; in psc_i2s_hw_params() local
44 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i" in psc_i2s_hw_params()
52 mode = MPC52xx_PSC_SICR_SIM_CODEC_8; in psc_i2s_hw_params()
55 mode = MPC52xx_PSC_SICR_SIM_CODEC_16; in psc_i2s_hw_params()
58 mode = MPC52xx_PSC_SICR_SIM_CODEC_24; in psc_i2s_hw_params()
61 mode = MPC52xx_PSC_SICR_SIM_CODEC_32; in psc_i2s_hw_params()
[all …]
/linux-6.12.1/drivers/sbus/char/
Ddisplay7seg.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* display7seg.c - Driver implementation for the 7-segment display
30 static int sol_compat = 0; /* Solaris compatibility mode */
32 /* Solaris compatibility flag -
34 * documented driver features (ref Sun doc 806-0180-03).
38 * 1) Device ALWAYS reverts to OBP-specified FLIPPED mode
44 * omitting above features, set this parameter to non-zero.
51 MODULE_DESCRIPTION("7-Segment Display driver for Sun Microsystems CP1400/1500");
61 * Register block address- see header for details
62 * -----------------------------------------
[all …]

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