Home
last modified time | relevance | path

Searched +full:ocelot +full:- +full:miim (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dmscc,ocelot.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
13 The Ocelot ethernet switch family contains chips that have an internal CPU
18 The switch family is a multi-port networking switch that supports many
25 - mscc,vsc7512
30 "#address-cells":
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmscc,miim.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/mscc,miim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi MII Management Controller (MIIM)
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - $ref: mdio.yaml#
18 - mscc,ocelot-miim
19 - microchip,lan966x-miim
21 "#address-cells":
[all …]
/linux-6.12.1/arch/mips/boot/dts/mscc/
Docelot.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
10 #address-cells = <1>;
11 #size-cells = <0>;
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
[all …]
/linux-6.12.1/drivers/net/mdio/
Dmdio-mscc-miim.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
14 #include <linux/mdio/mdio-mscc-miim.h>
15 #include <linux/mfd/ocelot.h>
63 /* When high resolution timers aren't built-in: we can't use usleep_range() as
76 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_status() local
79 ret = regmap_read(miim->regs, in mscc_miim_status()
80 MSCC_MIIM_REG_STATUS + miim->mii_status_offset, &val); in mscc_miim_status()
82 WARN_ONCE(1, "mscc miim status read error %d\n", ret); in mscc_miim_status()
109 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_read() local
117 ret = regmap_write(miim->regs, in mscc_miim_read()
[all …]
/linux-6.12.1/drivers/mfd/
Docelot-core.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Core driver for the Ocelot chip family.
6 * on-chip MIPS processor, or externally via SPI, I2C, PCIe. This core driver is
7 * intended to be the bus-agnostic glue between, for example, the SPI bus and
10 * Copyright 2021-2022 Innovative Advantage Inc.
12 * Author: Colin Foster <colin.foster@in-advantage.com>
22 #include <linux/mfd/ocelot.h>
27 #include <soc/mscc/ocelot.h>
29 #include "ocelot.h"
91 err = regmap_read(ddata->gcb_regmap, REG_GCB_SOFT_RST, &val); in ocelot_gcb_chip_rst_status()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/microchip/
Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-ocelot.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Author: <alexandre.belloni@free-electrons.com>
13 #include <linux/mfd/ocelot.h>
21 #include <linux/pinctrl/pinconf-generic.h>
239 [FUNC_MIIM] = "miim",
534 OCELOT_P(14, MIIM, TWI_SCL_M, SFP);
535 OCELOT_P(15, MIIM, TWI_SCL_M, SFP);
638 JAGUAR2_P(56, MIIM, SFP);
639 JAGUAR2_P(57, MIIM, SFP);
640 JAGUAR2_P(58, MIIM, SFP);
[all …]
/linux-6.12.1/drivers/net/dsa/ocelot/
Dseville_vsc9953.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <soc/mscc/ocelot.h>
10 #include <linux/mdio/mdio-mscc-miim.h>
13 #include <linux/pcs-lynx.h>
14 #include <linux/dsa/ocelot.h>
600 /* Layer-3 Information */
606 /* Layer-4 Information */
785 static int vsc9953_gcb_soft_rst_status(struct ocelot *ocelot) in vsc9953_gcb_soft_rst_status() argument
789 ocelot_field_read(ocelot, GCB_SOFT_RST_SWC_RST, &val); in vsc9953_gcb_soft_rst_status()
794 static int vsc9953_sys_ram_init_status(struct ocelot *ocelot) in vsc9953_sys_ram_init_status() argument
[all …]