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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dnuvoton,npcm845-clk.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM8XX Clock Controller
10 - Tomer Maimon <tmaimon77@gmail.com>
13 Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, which
19 - nuvoton,npcm845-clk
24 '#clock-cells':
27 See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full
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/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dnuvoton,npcm-fiu.txt9 The NPCM8XX supports four FIU modules,
14 - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
15 "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
16 - #address-cells : should be 1.
17 - #size-cells : should be 0.
18 - reg : the first contains the register location and length,
20 - reg-names: Should contain the reg names "control" and "memory"
21 - clocks : phandle of FIU reference clock.
24 - pinctrl-names : a pinctrl state named "default" must be defined.
25 - pinctrl-0 : phandle referencing pin configuration of the device.
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Dnuvoton,npcm-pspi.txt6 - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
7 "nuvoton,npcm845-pspi" for Arbel NPCM8XX.
8 - #address-cells : should be 1. see spi-bus.txt
9 - #size-cells : should be 0. see spi-bus.txt
10 - specifies physical base address and size of the register.
11 - interrupts : contain PSPI interrupt.
12 - clocks : phandle of PSPI reference clock.
13 - clock-names: Should be "clk_apb5".
14 - pinctrl-names : a pinctrl state named "default" must be defined.
15 - pinctrl-0 : phandle referencing pin configuration of the device.
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/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dnuvoton,sgpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim LIU <JJLIU0@nuvoton.com>
13 This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC and detailed
17 Clock is a division of the APB3 clock.
19 NPCM7xx/NPCM8xx have two sgpio modules. Each module can support up
22 - Support interrupt option for each input port and various interrupt
23 sensitivity options (level-high, level-low, edge-high, edge-low)
24 - ngpios is number of nuvoton,input-ngpios GPIO lines and nuvoton,output-ngpios GPIO lines.
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/linux-6.12.1/Documentation/devicetree/bindings/hwmon/
Dnpcm750-pwm-fan.txt3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
9 Required properties for pwm-fan node
10 - #address-cells : should be 1.
11 - #size-cells : should be 0.
12 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
13 : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
14 - reg : specifies physical base address and size of the registers.
15 - reg-names : must contain:
18 - clocks : phandle of reference clocks.
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/linux-6.12.1/include/dt-bindings/clock/
Dnuvoton,npcm845-clk.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
6 * Device Tree binding constants for NPCM8XX clock controller.
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dnuvoton,npcm750-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
19 - nuvoton,npcm750-adc
20 - nuvoton,npcm845-adc
36 vref-supply:
39 "#io-channel-cells":
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