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/linux-6.12.1/drivers/gpu/drm/msm/registers/adreno/
Da2xx.xml10 <enum name="a2xx_rb_dither_type">
11 <value name="DITHER_PIXEL" value="0"/>
12 <value name="DITHER_SUBPIXEL" value="1"/>
15 <enum name="a2xx_colorformatx">
16 <value name="COLORX_4_4_4_4" value="0"/>
17 <value name="COLORX_1_5_5_5" value="1"/>
18 <value name="COLORX_5_6_5" value="2"/>
19 <value name="COLORX_8" value="3"/>
20 <value name="COLORX_8_8" value="4"/>
21 <value name="COLORX_8_8_8_8" value="5"/>
[all …]
Da5xx.xml9 <enum name="a5xx_color_fmt">
10 <value value="0x02" name="RB5_A8_UNORM"/>
11 <value value="0x03" name="RB5_R8_UNORM"/>
12 <value value="0x04" name="RB5_R8_SNORM"/>
13 <value value="0x05" name="RB5_R8_UINT"/>
14 <value value="0x06" name="RB5_R8_SINT"/>
15 <value value="0x08" name="RB5_R4G4B4A4_UNORM"/>
16 <value value="0x0a" name="RB5_R5G5B5A1_UNORM"/>
17 <value value="0x0e" name="RB5_R5G6B5_UNORM"/>
18 <value value="0x0f" name="RB5_R8G8_UNORM"/>
[all …]
Da4xx.xml9 <enum name="a4xx_color_fmt">
10 <value name="RB4_A8_UNORM" value="0x01"/>
11 <value name="RB4_R8_UNORM" value="0x02"/>
12 <value name="RB4_R8_SNORM" value="0x03"/>
13 <value name="RB4_R8_UINT" value="0x04"/>
14 <value name="RB4_R8_SINT" value="0x05"/>
16 <value name="RB4_R4G4B4A4_UNORM" value="0x08"/>
17 <value name="RB4_R5G5B5A1_UNORM" value="0x0a"/>
18 <value name="RB4_R5G6B5_UNORM" value="0x0e"/>
19 <value name="RB4_R8G8_UNORM" value="0x0f"/>
[all …]
Da6xx.xml24 <enum name="a6xx_tile_mode">
25 <value name="TILE6_LINEAR" value="0"/>
26 <value name="TILE6_2" value="2"/>
27 <value name="TILE6_3" value="3"/>
30 <enum name="a6xx_format">
31 <value value="0x02" name="FMT6_A8_UNORM"/>
32 <value value="0x03" name="FMT6_8_UNORM"/>
33 <value value="0x04" name="FMT6_8_SNORM"/>
34 <value value="0x05" name="FMT6_8_UINT"/>
35 <value value="0x06" name="FMT6_8_SINT"/>
[all …]
Da3xx.xml9 <enum name="a3xx_tile_mode">
10 <value name="LINEAR" value="0"/>
11 <value name="TILE_4X4" value="1"/> <!-- "normal" case for textures -->
12 <value name="TILE_32X32" value="2"/> <!-- only used in GMEM -->
13 <value name="TILE_4X2" value="3"/> <!-- only used for CrCb -->
16 <enum name="a3xx_state_block_id">
17 <value name="HLSQ_BLOCK_ID_TP_TEX" value="2"/>
18 <value name="HLSQ_BLOCK_ID_TP_MIPMAP" value="3"/>
19 <value name="HLSQ_BLOCK_ID_SP_VS" value="4"/>
20 <value name="HLSQ_BLOCK_ID_SP_FS" value="6"/>
[all …]
Dadreno_common.xml7 <enum name="chip" bare="yes">
8 <value name="A2XX" value="2"/>
9 <value name="A3XX" value="3"/>
10 <value name="A4XX" value="4"/>
11 <value name="A5XX" value="5"/>
12 <value name="A6XX" value="6"/>
13 <value name="A7XX" value="7"/>
16 <enum name="adreno_pa_su_sc_draw">
17 <value name="PC_DRAW_POINTS" value="0"/>
18 <value name="PC_DRAW_LINES" value="1"/>
[all …]
Da6xx_gmu.xml8 <domain name="A6XX" width="32" prefix="variant" varset="chip">
10 <bitset name="A6XX_GMU_GPU_IDLE_STATUS">
11 <bitfield name="BUSY_IGN_AHB" pos="23"/>
12 <bitfield name="CX_GX_CPU_BUSY_IGN_AHB" pos="30"/>
15 <bitset name="A6XX_GMU_OOB">
16 <bitfield name="BOOT_SLUMBER_SET_MASK" pos="22"/>
17 <bitfield name="BOOT_SLUMBER_CHECK_MASK" pos="30"/>
18 <bitfield name="BOOT_SLUMBER_CLEAR_MASK" pos="30"/>
19 <bitfield name="DCVS_SET_MASK" pos="23"/>
20 <bitfield name="DCVS_CHECK_MASK" pos="31"/>
[all …]
Dadreno_pm4.xml8 <enum name="vgt_event_type" varset="chip">
9 <value name="VS_DEALLOC" value="0"/>
10 <value name="PS_DEALLOC" value="1" variants="A2XX-A6XX"/>
11 <value name="VS_DONE_TS" value="2"/>
12 <value name="PS_DONE_TS" value="3"/>
17 <value name="CACHE_FLUSH_TS" value="4"/>
18 <value name="CONTEXT_DONE" value="5"/>
19 <value name="CACHE_FLUSH" value="6" variants="A2XX-A4XX"/>
20 <value name="VIZQUERY_START" value="7" variants="A2XX"/>
21 <value name="HLSQ_FLUSH" value="7" variants="A3XX-A4XX"/>
[all …]
/linux-6.12.1/Documentation/netlink/specs/
Drt_link.yaml3 name: rt-link
12 name: ifinfo-flags
16 name: up
18 name: broadcast
20 name: debug
22 name: loopback
24 name: point-to-point
26 name: no-trailers
28 name: running
30 name: no-arp
[all …]
Dtc.yaml3 name: tc
13 name: tcmsg
17 name: family
20 name: pad
24 name: ifindex
27 name: handle
30 name: parent
33 name: info
36 name: tc-cls-flags
45 name: tc-flower-key-ctrl-flags
[all …]
Ddevlink.yaml3 name: devlink
12 name: sb-pool-type
15 name: ingress
17 name: egress
20 name: port-type
23 name: notset
25 name: auto
27 name: eth
29 name: ib
32 name: port-flavour
[all …]
Dethtool.yaml3 name: ethtool
11 name: udp-tunnel-type
12 enum-name:
16 name: stringset
20 name: header-flags
24 name: module-fw-flash-status
28 name: c33-pse-ext-state
29 enum-name:
31 name-prefix: ethtool-c33-pse-ext-state-
43 name: phy-upstream-type
[all …]
Dnftables.yaml3 name: nftables
12 name: nfgenmsg
16 name: nfgen-family
19 name: version
22 name: res-id
26 name: meta-keys
66 name: bitwise-ops
73 name: cmp-ops
83 name: object-type
98 name: nat-range-flags
[all …]
Dovs_flow.yaml3 name: ovs_flow
13 name: ovs-header
19 name: dp-ifindex
25 name: ovs-flow-stats
29 name: n-packets
33 name: n-bytes
37 name: ovs-key-ethernet
41 name: eth-src
46 name: eth-dst
51 name: ovs-key-mpls
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/registers/display/
Dhdmi.xml13 <domain name="HDMI" width="32">
14 <enum name="hdmi_hdcp_key_state">
15 <value name="HDCP_KEYS_STATE_NO_KEYS" value="0"/>
16 <value name="HDCP_KEYS_STATE_NOT_CHECKED" value="1"/>
17 <value name="HDCP_KEYS_STATE_CHECKING" value="2"/>
18 <value name="HDCP_KEYS_STATE_VALID" value="3"/>
19 <value name="HDCP_KEYS_STATE_AKSV_NOT_VALID" value="4"/>
20 <value name="HDCP_KEYS_STATE_CHKSUM_MISMATCH" value="5"/>
21 <value name="HDCP_KEYS_STATE_PROD_AKSV" value="6"/>
22 <value name="HDCP_KEYS_STATE_RESERVED" value="7"/>
[all …]
Ddsi_phy_7nm.xml7 <domain name="DSI_7nm_PHY_CMN" width="32">
8 <reg32 offset="0x00000" name="REVISION_ID0"/>
9 <reg32 offset="0x00004" name="REVISION_ID1"/>
10 <reg32 offset="0x00008" name="REVISION_ID2"/>
11 <reg32 offset="0x0000c" name="REVISION_ID3"/>
12 <reg32 offset="0x00010" name="CLK_CFG0"/>
13 <reg32 offset="0x00014" name="CLK_CFG1"/>
14 <reg32 offset="0x00018" name="GLBL_CTRL"/>
15 <reg32 offset="0x0001c" name="RBUF_CTRL"/>
16 <reg32 offset="0x00020" name="VREG_CTRL_0"/>
[all …]
Ddsi.xml7 <domain name="DSI" width="32">
8 <enum name="dsi_traffic_mode">
9 <value name="NON_BURST_SYNCH_PULSE" value="0"/>
10 <value name="NON_BURST_SYNCH_EVENT" value="1"/>
11 <value name="BURST_MODE" value="2"/>
13 <enum name="dsi_vid_dst_format">
14 <value name="VID_DST_FORMAT_RGB565" value="0"/>
15 <value name="VID_DST_FORMAT_RGB666" value="1"/>
16 <value name="VID_DST_FORMAT_RGB666_LOOSE" value="2"/>
17 <value name="VID_DST_FORMAT_RGB888" value="3"/>
[all …]
Dmdp5.xml9 <domain name="VBIF" width="32">
12 <domain name="MDSS" width="32">
13 <reg32 offset="0x00000" name="HW_VERSION">
14 <bitfield name="STEP" low="0" high="15" type="uint"/>
15 <bitfield name="MINOR" low="16" high="27" type="uint"/>
16 <bitfield name="MAJOR" low="28" high="31" type="uint"/>
19 <reg32 offset="0x00010" name="HW_INTR_STATUS">
20 <bitfield name="INTR_MDP" pos="0" type="boolean"/>
21 <bitfield name="INTR_DSI0" pos="4" type="boolean"/>
22 <bitfield name="INTR_DSI1" pos="5" type="boolean"/>
[all …]
Dmdp4.xml8 <domain name="MDP4" width="32">
9 <enum name="mdp4_pipe">
11 <value name="VG1" value="0"/>
12 <value name="VG2" value="1"/>
13 <value name="RGB1" value="2"/>
14 <value name="RGB2" value="3"/>
15 <value name="RGB3" value="4"/>
16 <value name="VG3" value="5"/>
17 <value name="VG4" value="6"/>
20 <enum name="mdp4_mixer">
[all …]
Dedp.xml7 <domain name="EDP" width="32">
8 <enum name="edp_color_depth">
9 <value name="EDP_6BIT" value="0"/>
10 <value name="EDP_8BIT" value="1"/>
11 <value name="EDP_10BIT" value="2"/>
12 <value name="EDP_12BIT" value="3"/>
13 <value name="EDP_16BIT" value="4"/>
16 <enum name="edp_component_format">
17 <value name="EDP_RGB" value="0"/>
18 <value name="EDP_YUV422" value="1"/>
[all …]
Ddsi_phy_28nm.xml7 <domain name="DSI_28nm_PHY" width="32">
8 <array offset="0x00000" name="LN" length="4" stride="0x40">
9 <reg32 offset="0x00" name="CFG_0"/>
10 <reg32 offset="0x04" name="CFG_1"/>
11 <reg32 offset="0x08" name="CFG_2"/>
12 <reg32 offset="0x0c" name="CFG_3"/>
13 <reg32 offset="0x10" name="CFG_4"/>
14 <reg32 offset="0x14" name="TEST_DATAPATH"/>
15 <reg32 offset="0x18" name="DEBUG_SEL"/>
16 <reg32 offset="0x1c" name="TEST_STR_0"/>
[all …]
Ddsi_phy_14nm.xml7 <domain name="DSI_14nm_PHY_CMN" width="32">
8 <reg32 offset="0x00000" name="REVISION_ID0"/>
9 <reg32 offset="0x00004" name="REVISION_ID1"/>
10 <reg32 offset="0x00008" name="REVISION_ID2"/>
11 <reg32 offset="0x0000c" name="REVISION_ID3"/>
12 <reg32 offset="0x00010" name="CLK_CFG0">
13 <bitfield name="DIV_CTRL_3_0" low="4" high="7" type="uint"/>
14 <bitfield name="DIV_CTRL_7_4" low="4" high="7" type="uint"/>
16 <reg32 offset="0x00014" name="CLK_CFG1">
17 <bitfield name="DSICLK_SEL" pos="0" type="boolean"/>
[all …]
/linux-6.12.1/scripts/kconfig/
Dgconf.glade6 <property name="visible">True</property>
7 <property name="title" translatable="yes">Gtk Kernel Configurator</property>
8 <property name="type">GTK_WINDOW_TOPLEVEL</property>
9 <property name="window_position">GTK_WIN_POS_NONE</property>
10 <property name="modal">False</property>
11 <property name="default_width">640</property>
12 <property name="default_height">480</property>
13 <property name="resizable">True</property>
14 <property name="destroy_with_parent">False</property>
15 <property name="decorated">True</property>
[all …]
/linux-6.12.1/include/rv/
Dda_monitor.h20 #define DECLARE_RV_REACTING_HELPERS(name, type) \ argument
21 static char REACT_MSG_##name[1024]; \
23 static inline char *format_react_msg_##name(type curr_state, type event) \
25 snprintf(REACT_MSG_##name, 1024, \
27 #name, \
28 model_get_event_name_##name(event), \
29 model_get_state_name_##name(curr_state)); \
30 return REACT_MSG_##name; \
33 static void cond_react_##name(char *msg) \
35 if (rv_##name.react) \
[all …]
/linux-6.12.1/drivers/scsi/lpfc/
Dlpfc_attr.h24 #define LPFC_ATTR(name, defval, minval, maxval, desc) \ argument
25 static uint lpfc_##name = defval;\
26 module_param(lpfc_##name, uint, S_IRUGO);\
27 MODULE_PARM_DESC(lpfc_##name, desc);\
28 lpfc_param_init(name, defval, minval, maxval)
30 #define LPFC_ATTR_R(name, defval, minval, maxval, desc) \ argument
31 static uint lpfc_##name = defval;\
32 module_param(lpfc_##name, uint, S_IRUGO);\
33 MODULE_PARM_DESC(lpfc_##name, desc);\
34 lpfc_param_show(name)\
[all …]

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