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/linux-6.12.1/Documentation/networking/
Dppp_generic.rst17 * PPP multilink: splitting datagrams between multiple links, and
35 This architecture makes it possible to implement PPP multilink in a
170 If multilink is not in use, this packet is then passed to the attached
179 If multilink is in use, the generic layer divides the packet into one
180 or more fragments and puts a multilink header on each fragment. It
272 In multilink terms, the unit represents the bundle, while the channels
276 across the individual links (if multilink is in use). In contrast, a
278 channel, without any multilink header.
355 SC_MULTILINK enable PPP multilink fragmentation on
357 SC_MP_SHORTSEQ expect short multilink sequence
[all …]
/linux-6.12.1/arch/arm/boot/dts/intel/ixp/
Dintel-ixp42x-goramo-multilink.dts3 * Device Tree file for the Goramo MultiLink Router
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
7 * This device tree supports MultiLink Basic.
20 model = "Goramo MultiLink Router";
21 compatible = "goramo,multilink-router", "intel,ixp42x";
27 * 64 MB of RAM according to the manual. The MultiLink
DMakefile12 intel-ixp42x-goramo-multilink.dtb \
/linux-6.12.1/drivers/net/ppp/
DKconfig99 bool "PPP multilink support"
102 PPP multilink is a protocol (defined in RFC 1990) which allows you
107 version of the pppd daemon which understands the multilink protocol.
Dppp_generic.c8 * /dev/ppp device, packet and VJ compression, and multilink.
69 #define MPHDRLEN 6 /* multilink protocol header length */
113 * and represents a multilink bundle.
169 * This includes the data structure used for multilink.
184 u8 avail; /* flag used in multilink stuff */
243 * Maximum number of multilink fragments queued up.
250 /* Multilink header bits. */
254 /* Compare multilink sequence numbers (assumed to be 32 bits wide) */
1892 /* not doing multilink: send it down the first channel */ in ppp_push()
1910 /* Multilink: fragment the packet over as many links in ppp_push()
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/linux-6.12.1/sound/hda/ext/
Dhdac_ext_controller.c67 * Multilink helpers - these helpers are useful for dealing with HDA
68 * new multilink capability
72 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
/linux-6.12.1/include/uapi/linux/
Dppp-ioctl.h31 #define SC_MULTILINK 0x00000400 /* do multilink encapsulation */
112 #define PPPIOCSMRRU _IOW('t', 59, int) /* set multilink MRU */
Datmsap.h27 #define ATM_L2_X25_ML 0x07 /* ITU-T X.25, multilink */
Dppp_defs.h44 #define PPP_MP 0x3d /* Multilink protocol */
/linux-6.12.1/Documentation/devicetree/bindings/arm/
Dintel-ixp4xx.yaml25 - goramo,multilink-router
/linux-6.12.1/include/linux/
Dppp_channel.h28 /* Send a packet (or multilink fragment) on this channel.
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-cadence-sierra.yaml10 This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink
Dphy-cadence-torrent.yaml12 PHY also supports multilink multiprotocol combinations including protocols
/linux-6.12.1/drivers/phy/cadence/
Dphy-cadence-sierra.c1288 * This completes the PHY configuration for multilink operation. This approach enables in cdns_sierra_phy_configure_multilink()
1493 /* If more than one subnode, configure the PHY as multilink */ in cdns_sierra_phy_probe()
1694 * refclk100MHz_32b_PCIe_ln_no_ssc, multilink, using_plllc,
1758 * refclk100MHz_32b_PCIe_ln_no_ssc, multilink, using_plllc,
1832 * refclk100MHz_32b_PCIe_ln_int_ssc, multilink, using_plllc,
1899 * refclk100MHz_32b_PCIe_ln_int_ssc, multilink, using_plllc,
1970 * refclk100MHz_32b_PCIe_ln_ext_ssc, multilink, using_plllc,
2037 * refclk100MHz_32b_PCIe_ln_ext_ssc, multilink, using_plllc,
Dphy-cadence-torrent.c2493 * configurations such as PCIe Multilink. in cdns_torrent_phy_configure_multilink()
3276 /* Multilink USXGMII, using PLL0, 156.25 MHz Ref clk, no SSC */
3294 /* Multilink SGMII/QSGMII, using PLL1, 100 MHz Ref clk, no SSC */
3309 /* TI J7200, Multilink USXGMII, using PLL0, 156.25 MHz Ref clk, no SSC */
3341 /* TI J7200, Multilink SGMII/QSGMII, using PLL1, 100 MHz Ref clk, no SSC */
3394 * Multilink USXGMII, using PLL1, 156.25 MHz Ref clk, no SSC
3602 /* DP Multilink, 100 MHz Ref clk, no SSC */
4231 /* TI J7200, multilink SGMII */
4410 /* TI J7200, multilink QSGMII */
/linux-6.12.1/drivers/soundwire/
Dstream.c742 * sdw_ml_sync_bank_switch: Multilink register bank switch
1253 * source. For more than one data source (multilink), in sdw_config_stream()
1887 "Multilink not supported, link %d\n", bus->link_id); in sdw_stream_add_master()
/linux-6.12.1/Documentation/
DChanges345 The PPP driver has been restructured to support multilink and to
/linux-6.12.1/Documentation/process/
Dchanges.rst345 The PPP driver has been restructured to support multilink and to
/linux-6.12.1/include/sound/
Dhdaudio.h282 * @mlcap: MultiLink capabilities pointer