Searched +full:msm +full:- +full:id (Results 1 – 25 of 269) sorted by relevance
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/linux-6.12.1/Documentation/devicetree/bindings/iommu/ |
D | qcom,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 13 Qualcomm "B" family devices which are not compatible with arm-smmu have 16 to non-secure vs secure interrupt line. 21 - items: 22 - enum: 23 - qcom,msm8916-iommu [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/qcom/ |
D | qcom,apr-services.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr-services.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 21 APR Service ID 33 GPR Service ID 39 qcom,protection-domain: 40 $ref: /schemas/types.yaml#/definitions/string-array 44 "avs/audio", "msm/adsp/audio_pd". [all …]
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D | qcom,gsbi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 16 representing a serial sub-node device that is mux'd as part of the GSBI 26 const: qcom,gsbi-v1.0.0 28 '#address-cells': [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/serial/ |
D | qcom,msm-uartdm.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM Serial UARTDM 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 The MSM serial UARTDM hardware is designed for high-speed use cases where the 16 transmit and/or receive channels can be offloaded to a dma-engine. From a [all …]
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D | qcom,msm-uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM SoC Serial UART 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 14 The MSM serial UART hardware is designed for low-speed use cases where a 15 dma-engine isn't needed. From a software perspective it's mostly compatible 16 with the MSM serial UARTDM except that it only supports reading and writing [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/arm/ |
D | qcom-soc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/qcom-soc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 15 qcom,SoC-IP 18 qcom,sdm845-llcc-bwmon 26 pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" 28 - compatible 34 - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+(pro)?-.*$" [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10 - Bhupesh Sharma <bhupesh.sharma@linaro.org> 19 - enum: 20 - qcom,sdhci-msm-v4 22 - items: 23 - enum: [all …]
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/linux-6.12.1/drivers/net/ethernet/aquantia/atlantic/hw_atl/ |
D | hw_atl_llh.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright (C) 2014-2019 aQuantia Corporation 5 * Copyright (C) 2019-2020 Marvell International Ltd. 71 /* get msm rx errors counter register */ 74 /* get msm rx unicast frames counter register */ 77 /* get msm rx multicast frames counter register */ 80 /* get msm rx broadcast frames counter register */ 83 /* get msm rx broadcast octets counter register 1 */ 86 /* get msm rx unicast octets counter register 0 */ 89 /* get msm tx errors counter register */ [all …]
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/linux-6.12.1/Documentation/gpu/ |
D | msm-crash-dump.rst | 4 MSM Crash Dump Format 7 Following a GPU hang the MSM driver outputs debugging information via 14 by a (-). 17 -------- 35 ID of the GPU that generated the crash formatted as 38 rbbm-status 44 identified with an id number. 46 id 47 Ringbuffer ID (0 based index). Each ringbuffer in the section 48 will have its own unique id. [all …]
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/linux-6.12.1/drivers/soc/qcom/ |
D | qcom_pd_mapper.c | 1 // SPDX-License-Identifier: GPL-2.0-only 27 /* NULL-terminated array */ 57 list_for_each_entry(service, &data->services, list) { in qcom_pdm_find() 58 if (!strcmp(service->name, name)) in qcom_pdm_find() 75 list_for_each_entry(domain, &service->domains, list) { in qcom_pdm_add_service_domain() 76 if (!strcmp(domain->name, domain_name)) in qcom_pdm_add_service_domain() 77 return -EBUSY; in qcom_pdm_add_service_domain() 82 return -ENOMEM; in qcom_pdm_add_service_domain() 84 INIT_LIST_HEAD(&service->domains); in qcom_pdm_add_service_domain() 85 service->name = service_name; in qcom_pdm_add_service_domain() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/watchdog/ |
D | qcom-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer 10 - Rajendra Nayak <quic_rjendra@quicinc.com> 14 pattern: "^(watchdog|timer)@[0-9a-f]+$" 18 - items: 19 - enum: 20 - qcom,kpss-wdt-ipq4019 [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/msm/ |
D | qcom,sc8280xp-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sc8280xp-mdss 24 - description: Display AHB clock from gcc [all …]
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D | qcom,sm6115-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm6115-dpu 20 - description: MDP register set 21 - description: VBIF register set 23 reg-names: [all …]
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D | qcom,qcm2290-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Loic Poulain <loic.poulain@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,qcm2290-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set 23 reg-names: [all …]
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D | qcom,sdm845-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sdm670-dpu 18 - qcom,sdm845-dpu 22 - description: Address offset and size for mdp register set 23 - description: Address offset and size for vbif register set [all …]
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D | mdss-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 - Rob Clark <robdclark@gmail.com> 15 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 16 sub-blocks like DPU display controller, DSI and DP interfaces etc. 25 pattern: "^display-subsystem@[0-9a-f]+$" [all …]
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D | qcom,sc7280-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sc7280-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set 23 reg-names: [all …]
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D | qcom,sm8150-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8150-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm8150-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set 23 reg-names: [all …]
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D | qcom,msm8998-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,msm8998-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for regdma register set 22 - description: Address offset and size for vbif register set [all …]
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D | qcom,sm8250-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm8250-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set 23 reg-names: [all …]
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D | qcom,sc7180-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sc7180-dpu 18 - qcom,sm6125-dpu 19 - qcom,sm6350-dpu 20 - qcom,sm6375-dpu [all …]
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D | dp-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MSM Display Port Controller 10 - Kuogee Hsieh <quic_khsieh@quicinc.com> 13 Device tree bindings for DisplayPort host controller for MSM targets 19 - enum: 20 - qcom,sc7180-dp 21 - qcom,sc7280-dp [all …]
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D | qcom,qcm2290-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Loic Poulain <loic.poulain@linaro.org> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,qcm2290-mdss 25 - description: Display AHB clock from gcc [all …]
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D | qcom,sm6125-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marijn Suijten <marijn.suijten@somainline.org> 13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6125-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AHB clock [all …]
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D | qcom,sm6375-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6375-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AHB clock [all …]
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