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/linux-6.12.1/drivers/pci/controller/
Dpcie-iproc-msi.c9 #include <linux/msi.h>
34 /* Size of each MSI address region */
52 * struct iproc_msi_grp - iProc MSI group
54 * One MSI group is allocated per GIC interrupt, serviced by one iProc MSI
57 * @msi: pointer to iProc MSI data
62 struct iproc_msi *msi; member
68 * struct iproc_msi - iProc event queue based MSI
70 * Only meant to be used on platforms without MSI support integrated into the
74 * @reg_offsets: MSI register offsets
75 * @grps: MSI groups
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Dpcie-altera-msi.c3 * Altera PCIe MSI support
15 #include <linux/msi.h>
41 static inline void msi_writel(struct altera_msi *msi, const u32 value, in msi_writel() argument
44 writel_relaxed(value, msi->csr_base + reg); in msi_writel()
47 static inline u32 msi_readl(struct altera_msi *msi, const u32 reg) in msi_readl() argument
49 return readl_relaxed(msi->csr_base + reg); in msi_readl()
55 struct altera_msi *msi; in altera_msi_isr() local
61 msi = irq_desc_get_handler_data(desc); in altera_msi_isr()
63 while ((status = msi_readl(msi, MSI_STATUS)) != 0) { in altera_msi_isr()
64 for_each_set_bit(bit, &status, msi->num_of_vectors) { in altera_msi_isr()
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Dpci-xgene-msi.c3 * APM X-Gene MSI Driver
13 #include <linux/msi.h>
27 struct xgene_msi *msi; member
48 .name = "X-Gene1 MSI",
62 * X-Gene v1 has 16 groups of MSI termination registers MSInIRx, where
85 * Each index register supports 16 MSI vectors (0..15) to generate interrupt.
86 * There are total 16 GIC IRQs assigned for these 16 groups of MSI termination
89 * Each MSI termination group has 1 MSIINTn register (n is 0..15) to indicate
90 * the MSI pending status caused by 1 of its 8 index registers.
94 static u32 xgene_msi_ir_read(struct xgene_msi *msi, in xgene_msi_ir_read() argument
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Dpcie-xilinx-dma-pl.c13 #include <linux/msi.h>
46 IMR(MSI) | \
76 /* Number of MSI IRQs */
112 * @msi: MSI information
127 struct xilinx_msi msi; member
272 struct xilinx_msi *msi; in xilinx_pl_dma_pcie_msi_handler_high() local
277 msi = &port->msi; in xilinx_pl_dma_pcie_msi_handler_high()
283 virq = irq_find_mapping(msi->dev_domain, bit); in xilinx_pl_dma_pcie_msi_handler_high()
295 struct xilinx_msi *msi; in xilinx_pl_dma_pcie_msi_handler_low() local
299 msi = &port->msi; in xilinx_pl_dma_pcie_msi_handler_low()
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/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dpci-msi.txt2 relationship between PCI devices and MSI controllers.
18 Requester ID. A mechanism is required to associate a device with both the MSI
22 For generic MSI bindings, see
23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
32 - msi-map: Maps a Requester ID to an MSI controller and associated
33 msi-specifier data. The property is an arbitrary number of tuples of
34 (rid-base,msi-controller,msi-base,length), where:
38 * msi-controller is a single phandle to an MSI controller
40 * msi-base is an msi-specifier describing the msi-specifier produced for the
47 the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
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Dxgene-pci-msi.txt1 * AppliedMicro X-Gene v1 PCIe MSI controller
5 - compatible: should be "apm,xgene1-msi" to identify
6 X-Gene v1 PCIe MSI controller block.
7 - msi-controller: indicates that this is an X-Gene v1 PCIe MSI controller node
9 registers. These registers include the MSI termination address and data
10 registers as well as the MSI interrupt status registers.
16 Each PCIe node needs to have property msi-parent that points to an MSI
23 + MSI node:
24 msi@79000000 {
25 compatible = "apm,xgene1-msi";
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/linux-6.12.1/arch/powerpc/sysdev/
Dfsl_msi.c11 #include <linux/msi.h>
39 #define msi_hwirq(msi, msir_index, intr_index) \ argument
40 ((msir_index) << (msi)->srs_shift | \
41 ((intr_index) << (msi)->ibs_shift))
63 * in the cascade interrupt. So, this MSI interrupt has been acked
78 seq_printf(p, " fsl-msi-%d", cascade_virq); in fsl_msi_print_chip()
152 /* If the msi-address-64 property exists, then use it */ in fsl_compose_msi_msg()
153 reg = of_get_property(hose->dn, "msi-address-64", &len); in fsl_compose_msi_msg()
164 * that neither MSI nor MSI-X can work fine. in fsl_compose_msi_msg()
165 * This is a workaround to allow MSI-X to function in fsl_compose_msi_msg()
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dmsi.txt1 This document describes the generic device tree binding for MSI controllers and
9 those busses to the MSI controllers which they are capable of using,
17 they can address. An MSI controller may feature a number of doorbells.
22 MSI controllers may have restrictions on permitted payloads.
28 MSI controller and device rather than a property of either in isolation).
31 MSI controllers:
34 An MSI controller signals interrupts to a CPU when a write is made to an MMIO
35 address by some master. An MSI controller may feature a number of doorbells.
40 - msi-controller: Identifies the node as an MSI controller.
45 - #msi-cells: The number of cells in an msi-specifier, required if not zero.
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Dfsl,ls-msi.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-msi.yaml#
7 title: Freescale Layerscape SCFG PCIe MSI controller
15 Each PCIe node needs to have property msi-parent that points to
16 MSI controller node
24 - fsl,ls1012a-msi
25 - fsl,ls1021a-msi
26 - fsl,ls1043a-msi
27 - fsl,ls1043a-v1.1-msi
28 - fsl,ls1046a-msi
33 '#msi-cells':
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Dloongson,pch-msi.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
7 title: Loongson PCH MSI Controller
14 transforming interrupts from PCIe MSI into HyperTransport vectorized
19 const: loongson,pch-msi-1.0
24 loongson,msi-base-vec:
27 to PCH MSI.
32 loongson,msi-num-vecs:
35 to PCH MSI.
40 msi-controller: true
45 - msi-controller
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Dfsl,mu-msi.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
7 title: Freescale/NXP i.MX Messaging Unit (MU) work as msi controller
25 MU can work as msi interrupt controller to do doorbell
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
33 - fsl,imx6sx-mu-msi
34 - fsl,imx7ulp-mu-msi
35 - fsl,imx8ulp-mu-msi
36 - fsl,imx8ulp-mu-msi-s4
67 msi-controller: true
69 "#msi-cells":
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Dmsi-controller.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/msi-controller.yaml#
7 title: MSI controller
13 An MSI controller signals interrupts to a CPU when a write is made
14 to an MMIO address by some master. An MSI controller may feature a
18 "#msi-cells":
20 The number of cells in an msi-specifier, required if not zero.
26 The meaning of the msi-specifier is defined by the device tree
27 binding of the specific MSI controller.
30 msi-controller:
32 Identifies the node as an MSI controller.
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/linux-6.12.1/arch/arm64/kvm/vgic/
Dvgic-irqfd.c55 e->msi.address_lo = ue->u.msi.address_lo; in kvm_set_routing_entry()
56 e->msi.address_hi = ue->u.msi.address_hi; in kvm_set_routing_entry()
57 e->msi.data = ue->u.msi.data; in kvm_set_routing_entry()
58 e->msi.flags = ue->flags; in kvm_set_routing_entry()
59 e->msi.devid = ue->u.msi.devid; in kvm_set_routing_entry()
70 struct kvm_msi *msi) in kvm_populate_msi() argument
72 msi->address_lo = e->msi.address_lo; in kvm_populate_msi()
73 msi->address_hi = e->msi.address_hi; in kvm_populate_msi()
74 msi->data = e->msi.data; in kvm_populate_msi()
75 msi->flags = e->msi.flags; in kvm_populate_msi()
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/linux-6.12.1/include/linux/
Dmsi.h6 * This header file contains MSI data structures and functions which are
9 * - PCI/MSI core code
10 * - MSI interrupt domain implementations
12 * dealing with low level MSI details.
15 * especially storing MSI descriptor pointers in random code is considered
26 #include <asm/msi.h>
52 * msi_msg - Representation of a MSI message
53 * @address_lo: Low 32 bits of msi message address
55 * @address_hi: High 32 bits of msi message address
58 * @data: MSI message data (usually 16 bits)
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/linux-6.12.1/Documentation/PCI/
Dmsi-howto.rst5 The MSI Driver Guide HOWTO
16 the advantages of using MSI over traditional interrupt mechanisms, how
17 to change your driver to use MSI or MSI-X and some basic diagnostics to
27 The MSI capability was first specified in PCI 2.2 and was later enhanced
28 in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
30 per device than MSI and allows interrupts to be independently configured.
32 Devices may support both MSI and MSI-X, but only one can be enabled at
73 driver has to set up the device to use MSI or MSI-X. Not all machines
80 To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
86 Using MSI
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/linux-6.12.1/drivers/pci/msi/
Dapi.c3 * PCI MSI/MSI-X — Exported APIs for device drivers
14 #include "msi.h"
17 * pci_enable_msi() - Enable MSI interrupt mode on device
20 * Legacy device driver API to enable MSI interrupts mode on device and
40 * pci_disable_msi() - Disable MSI interrupt mode on device
43 * Legacy device driver API to disable MSI interrupt mode on device,
64 * pci_msix_vec_count() - Get number of MSI-X interrupt vectors on device
67 * Return: number of MSI-X interrupt vectors available on this device
68 * (i.e., the device's MSI-X capability structure "table size"), -EINVAL
69 * if the device is not MSI-X capable, other errnos otherwise.
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Dirqdomain.c3 * PCI Message Signaled Interrupt (MSI) - irqdomain support
9 #include "msi.h"
36 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
37 * @irq_data: Pointer to interrupt data of the MSI interrupt
45 * For MSI-X desc->irq is always equal to irq_data->irq. For in pci_msi_domain_write_msg()
46 * MSI only the first interrupt of MULTI MSI passes the test. in pci_msi_domain_write_msg()
53 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
54 * @desc: Pointer to the MSI descriptor
104 * pci_msi_create_irq_domain - Create a MSI interrupt domain
106 * @info: MSI domain info
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/linux-6.12.1/Documentation/devicetree/bindings/powerpc/fsl/
Dmsi-pic.txt1 * Freescale MSI interrupt controller
5 The first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
6 etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" or
7 "fsl,mpic-msi-v4.3" depending on the parent type and version. If mpic
8 version is 4.3, the number of MSI registers is increased to 16, MSIIR1 is
9 provided to access these 16 registers, and compatible "fsl,mpic-msi-v4.3"
17 region must be added because different MSI group has different MSIIR1 offset.
21 be set as edge sensitive. If msi-available-ranges is present, only
25 - msi-available-ranges: use <start count> style section to define which
26 msi interrupt can be used in the 256 msi interrupts. This property is
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/linux-6.12.1/drivers/pci/controller/mobiveil/
Dpcie-mobiveil-host.c19 #include <linux/msi.h>
88 struct mobiveil_msi *msi = &rp->msi; in mobiveil_pcie_isr() local
95 * The core provides a single interrupt for both INTx/MSI messages. in mobiveil_pcie_isr()
96 * So we'll read both INTx and MSI status in mobiveil_pcie_isr()
134 /* read extra MSI status register */ in mobiveil_pcie_isr()
137 /* handle MSI interrupts */ in mobiveil_pcie_isr()
143 * once we pop not only the MSI data but also address in mobiveil_pcie_isr()
144 * from MSI hardware FIFO. So keeping these following in mobiveil_pcie_isr()
151 dev_dbg(dev, "MSI registers, data: %08x, addr: %08x:%08x\n", in mobiveil_pcie_isr()
154 generic_handle_domain_irq(msi->dev_domain, msi_data); in mobiveil_pcie_isr()
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/linux-6.12.1/arch/mips/pci/
Dmsi-octeon.c10 #include <linux/msi.h>
23 * Each bit in msi_free_irq_bitmask represents a MSI interrupt that is
31 * is used so we can disable all of the MSI interrupts when a device
43 * Number of MSI IRQs used. This variable is set up in
49 * arch_setup_msi_irq() - setup MSI IRQs for a device
50 * @dev: Device requesting MSI interrupts
51 * @desc: MSI descriptor
53 * Called when a driver requests MSI interrupts instead of the
55 * for MSI devices that support them. A device can override this by
56 * programming the MSI control bits [6:4] before calling
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/linux-6.12.1/drivers/ntb/
Dmsi.c6 #include <linux/msi.h>
19 * ntb_msi_init() - Initialize the MSI context
23 * It initializes the context for MSI operations and maps
45 ntb->msi = devm_kzalloc(&ntb->dev, struct_size(ntb->msi, peer_mws, peers), in ntb_msi_init()
47 if (!ntb->msi) in ntb_msi_init()
50 ntb->msi->desc_changed = desc_changed; in ntb_msi_init()
60 ntb->msi->peer_mws[i] = devm_ioremap(&ntb->dev, mw_phys_addr, in ntb_msi_init()
62 if (!ntb->msi->peer_mws[i]) { in ntb_msi_init()
72 if (ntb->msi->peer_mws[i]) in ntb_msi_init()
73 devm_iounmap(&ntb->dev, ntb->msi->peer_mws[i]); in ntb_msi_init()
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/linux-6.12.1/kernel/irq/
Dmsi.c14 #include <linux/msi.h>
25 * struct msi_device_data - MSI per device data
26 * @properties: MSI properties which are interesting to drivers
27 * @mutex: Mutex protecting the MSI descriptor store
28 * @__domains: Internal data for per device MSI domains
39 * struct msi_ctrl - MSI internal management control structure
44 * than the range due to PCI/multi-MSI.
103 struct msi_device_data *md = dev->msi.data; in msi_insert_desc()
139 * msi_domain_insert_msi_desc - Allocate and initialize a MSI descriptor and
144 * @init_desc: Pointer to an MSI descriptor to initialize the new descriptor
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/linux-6.12.1/arch/riscv/kvm/
Dvm.c71 struct kvm_msi msi; in kvm_set_msi() local
76 msi.address_lo = e->msi.address_lo; in kvm_set_msi()
77 msi.address_hi = e->msi.address_hi; in kvm_set_msi()
78 msi.data = e->msi.data; in kvm_set_msi()
79 msi.flags = e->msi.flags; in kvm_set_msi()
80 msi.devid = e->msi.devid; in kvm_set_msi()
82 return kvm_riscv_aia_inject_msi(kvm, &msi); in kvm_set_msi()
135 e->msi.address_lo = ue->u.msi.address_lo; in kvm_set_routing_entry()
136 e->msi.address_hi = ue->u.msi.address_hi; in kvm_set_routing_entry()
137 e->msi.data = ue->u.msi.data; in kvm_set_routing_entry()
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/linux-6.12.1/Documentation/PCI/endpoint/
Dpci-test-howto.rst79 to change the vendorid and the number of MSI interrupts used by the function
158 SET IRQ TYPE TO MSI: OKAY
191 SET IRQ TYPE TO MSI-X: OKAY
192 MSI-X1: OKAY
193 MSI-X2: OKAY
194 MSI-X3: OKAY
195 MSI-X4: OKAY
196 MSI-X5: OKAY
197 MSI-X6: OKAY
198 MSI-X7: OKAY
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/linux-6.12.1/drivers/pci/controller/plda/
Dpcie-plda-host.c13 #include <linux/msi.h>
33 struct plda_msi *msi = &port->msi; in plda_handle_msi() local
46 for_each_set_bit(bit, &status, msi->num_vectors) { in plda_handle_msi()
47 ret = generic_handle_domain_irq(msi->dev_domain, bit); in plda_handle_msi()
49 dev_err_ratelimited(dev, "bad MSI IRQ %d\n", in plda_handle_msi()
69 phys_addr_t addr = port->msi.vector_phy; in plda_compose_msi_msg()
75 dev_dbg(port->dev, "msi#%x address_hi %#x address_lo %#x\n", in plda_compose_msi_msg()
80 .name = "PLDA MSI",
91 struct plda_msi *msi = &port->msi; in plda_irq_msi_domain_alloc() local
94 mutex_lock(&msi->lock); in plda_irq_msi_domain_alloc()
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