/linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
D | mscc,ocelot.yaml | 4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# 25 - mscc,vsc7512 42 $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml 50 - mscc,ocelot-sgpio 54 $ref: /schemas/net/mscc,miim.yaml 58 - mscc,ocelot-miim 62 $ref: /schemas/net/mscc,vsc7514-switch.yaml 67 - mscc,vsc7512-switch 90 compatible = "mscc,vsc7512"; 97 compatible = "mscc,ocelot-miim"; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mips/ |
D | mscc.txt | 7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" 19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon" 24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; 35 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" 40 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
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/linux-6.12.1/drivers/net/phy/mscc/ |
D | Makefile | 3 # Makefile for MSCC networking PHY driver 5 obj-$(CONFIG_MICROSEMI_PHY) := mscc.o 6 mscc-objs := mscc_main.o 7 mscc-objs += mscc_serdes.o 10 mscc-objs += mscc_macsec.o 14 mscc-objs += mscc_ptp.o
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | mscc,ocelot-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml# 18 - mscc,jaguar2-pinctrl 19 - mscc,luton-pinctrl 20 - mscc,ocelot-pinctrl 21 - mscc,serval-pinctrl 22 - mscc,servalt-pinctrl 99 compatible = "mscc,ocelot-pinctrl";
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/linux-6.12.1/arch/mips/boot/dts/mscc/ |
D | ocelot.dtsi | 7 compatible = "mscc,ocelot"; 55 compatible = "mscc,ocelot-cpu-syscon", "syscon"; 60 compatible = "mscc,ocelot-icpu-intr"; 82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; 108 compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi"; 119 compatible = "mscc,vsc7514-switch"; 200 compatible = "mscc,ocelot-chip-reset"; 205 compatible = "mscc,ocelot-pinctrl"; 239 compatible = "mscc,ocelot-miim"; 261 compatible = "mscc,ocelot-miim"; [all …]
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D | jaguar2.dtsi | 9 compatible = "mscc,jr2"; 59 compatible = "mscc,ocelot-cpu-syscon", "syscon"; 64 compatible = "mscc,jaguar2-icpu-intr"; 99 compatible = "mscc,jaguar2-pinctrl"; 142 compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; 155 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
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D | luton.dtsi | 7 compatible = "mscc,luton"; 55 compatible = "mscc,ocelot-cpu-syscon", "syscon"; 60 compatible = "mscc,luton-icpu-intr"; 82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; 95 compatible = "mscc,luton-pinctrl";
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D | serval.dtsi | 9 compatible = "mscc,serval"; 58 compatible = "mscc,ocelot-cpu-syscon", "syscon"; 63 compatible = "mscc,serval-icpu-intr"; 98 compatible = "mscc,serval-pinctrl"; 141 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
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D | serval_pcb106.dts | 11 compatible = "mscc,serval-pcb106", "mscc,serval";
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D | serval_pcb105.dts | 11 compatible = "mscc,serval-pcb105", "mscc,serval";
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | mscc,ocelot-icpu-intr.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml# 24 - mscc,jaguar2-icpu-intr 25 - mscc,luton-icpu-intr 26 - mscc,ocelot-icpu-intr 27 - mscc,serval-icpu-intr 56 compatible = "mscc,ocelot-icpu-intr";
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/linux-6.12.1/Documentation/devicetree/bindings/power/reset/ |
D | ocelot-reset.txt | 6 The reset registers are both present in the MSCC vcoreiii MIPS and 11 - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset", 12 "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset" 16 compatible = "mscc,ocelot-chip-reset";
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/linux-6.12.1/drivers/net/ethernet/mscc/ |
D | ocelot.h | 19 #include <soc/mscc/ocelot_qsys.h> 20 #include <soc/mscc/ocelot_sys.h> 21 #include <soc/mscc/ocelot_dev.h> 22 #include <soc/mscc/ocelot_ana.h> 23 #include <soc/mscc/ocelot_ptp.h> 24 #include <soc/mscc/ocelot_vcap.h> 25 #include <soc/mscc/ocelot.h>
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | mscc,vsc7514-serdes.yaml | 4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml# 29 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see 30 Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot. 35 - mscc,vsc7514-serdes 54 compatible = "mscc,vsc7514-serdes";
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/linux-6.12.1/arch/mips/generic/ |
D | board-jaguar2.its.S | 5 description = "MSCC Jaguar2 PCB110 Device Tree"; 6 data = /incbin/("boot/dts/mscc/jaguar2_pcb110.dtb"); 15 description = "MSCC Jaguar2 PCB111 Device Tree"; 16 data = /incbin/("boot/dts/mscc/jaguar2_pcb111.dtb");
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D | board-ocelot.its.S | 5 description = "MSCC Ocelot PCB123 Device Tree"; 6 data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb"); 16 description = "MSCC Ocelot PCB120 Device Tree"; 17 data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb");
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D | board-luton.its.S | 5 description = "MSCC Luton PCB091 Device Tree"; 6 data = /incbin/("boot/dts/mscc/luton_pcb091.dtb");
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | mscc,vsc7514-switch.yaml | 4 $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml# 25 const: mscc,vsc7514-switch 40 const: mscc,vsc7512-switch 52 - mscc,vsc7512-switch 53 - mscc,vsc7514-switch 131 compatible = "mscc,vsc7514-switch"; 179 compatible = "mscc,vsc7512-switch";
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D | mscc,miim.yaml | 4 $id: http://devicetree.org/schemas/net/mscc,miim.yaml# 18 - mscc,ocelot-miim 62 compatible = "mscc,ocelot-miim";
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/linux-6.12.1/drivers/power/reset/ |
D | ocelot-reset.c | 101 .syscon = "mscc,ocelot-cpu-syscon", 108 .syscon = "mscc,ocelot-cpu-syscon", 115 .syscon = "mscc,ocelot-cpu-syscon", 130 .compatible = "mscc,jaguar2-chip-reset", 133 .compatible = "mscc,luton-chip-reset", 136 .compatible = "mscc,ocelot-chip-reset",
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/linux-6.12.1/drivers/mfd/ |
D | ocelot-core.c | 27 #include <soc/mscc/ocelot.h> 165 .of_compatible = "mscc,ocelot-pinctrl", 170 .of_compatible = "mscc,ocelot-sgpio", 175 .of_compatible = "mscc,ocelot-miim", 182 .of_compatible = "mscc,ocelot-miim", 189 .of_compatible = "mscc,vsc7514-serdes", 194 .of_compatible = "mscc,vsc7512-switch",
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/linux-6.12.1/drivers/net/mdio/ |
D | mdio-mscc-miim.c | 14 #include <linux/mdio/mdio-mscc-miim.h> 82 WARN_ONCE(1, "mscc miim status read error %d\n", ret); in mscc_miim_status() 125 WARN_ONCE(1, "mscc miim write cmd reg error %d\n", ret); in mscc_miim_read() 136 WARN_ONCE(1, "mscc miim read data reg error %d\n", ret); in mscc_miim_read() 169 WARN_ONCE(1, "mscc miim write error %d\n", ret); in mscc_miim_write() 188 WARN_ONCE(1, "mscc reset set error %d\n", ret); in mscc_miim_reset() 194 WARN_ONCE(1, "mscc reset clear error %d\n", ret); in mscc_miim_reset() 368 .compatible = "mscc,ocelot-miim", 382 .name = "mscc-miim",
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/linux-6.12.1/Documentation/devicetree/bindings/sound/ |
D | mscc,zl38060.yaml | 4 $id: http://devicetree.org/schemas/sound/mscc,zl38060.yaml# 23 const: mscc,zl38060 67 compatible = "mscc,zl38060";
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/linux-6.12.1/drivers/net/dsa/ocelot/ |
D | ocelot_ext.c | 9 #include <soc/mscc/ocelot.h> 10 #include <soc/mscc/vsc7514_regs.h> 94 { .compatible = "mscc,vsc7512-switch" },
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/linux-6.12.1/Documentation/devicetree/bindings/spi/ |
D | snps,dw-apb-ssi.yaml | 19 - mscc,ocelot-spi 20 - mscc,jaguar2-spi 62 - mscc,ocelot-spi 63 - mscc,jaguar2-spi
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