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/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110-pine64-star64.dts48 motorcomm,rx-clk-drv-microamp = <2910>;
49 motorcomm,rx-data-drv-microamp = <2910>;
50 motorcomm,tx-clk-adj-enabled;
51 motorcomm,tx-clk-10-inverted;
52 motorcomm,tx-clk-100-inverted;
53 motorcomm,tx-clk-1000-inverted;
59 motorcomm,rx-clk-drv-microamp = <2910>;
60 motorcomm,rx-data-drv-microamp = <2910>;
61 motorcomm,tx-clk-adj-enabled;
62 motorcomm,tx-clk-10-inverted;
[all …]
Djh7110-starfive-visionfive-2-v1.3b.dts28 motorcomm,tx-clk-adj-enabled;
29 motorcomm,tx-clk-100-inverted;
30 motorcomm,tx-clk-1000-inverted;
31 motorcomm,rx-clk-drv-microamp = <3970>;
32 motorcomm,rx-data-drv-microamp = <2910>;
38 motorcomm,tx-clk-adj-enabled;
39 motorcomm,tx-clk-100-inverted;
40 motorcomm,rx-clk-drv-microamp = <3970>;
41 motorcomm,rx-data-drv-microamp = <2910>;
Djh7110-milkv-mars.dts29 motorcomm,tx-clk-adj-enabled;
30 motorcomm,tx-clk-10-inverted;
31 motorcomm,tx-clk-100-inverted;
32 motorcomm,tx-clk-1000-inverted;
33 motorcomm,rx-clk-drv-microamp = <3970>;
34 motorcomm,rx-data-drv-microamp = <2910>;
Djh7100-starfive-visionfive-v1.dts26 * The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
32 * which uses a Microchip PHY. Hence, most likely the Motorcomm PHY is the one
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmotorcomm,yt8xxx.yaml4 $id: http://devicetree.org/schemas/net/motorcomm,yt8xxx.yaml#
7 title: MotorComm yt8xxx Ethernet PHY
38 motorcomm,clk-out-frequency-hz:
43 motorcomm,keep-pll-enabled:
49 motorcomm,auto-sleep-disabled:
55 motorcomm,rx-clk-drv-microamp:
72 motorcomm,rx-data-drv-microamp:
89 motorcomm,tx-clk-adj-enabled:
95 motorcomm,tx-clk-10-inverted:
101 motorcomm,tx-clk-100-inverted:
[all …]
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3328-orangepi-r1-plus-lts.dts29 motorcomm,auto-sleep-disabled;
30 motorcomm,clk-out-frequency-hz = <125000000>;
31 motorcomm,keep-pll-enabled;
32 motorcomm,rx-clk-drv-microamp = <5020>;
33 motorcomm,rx-data-drv-microamp = <5020>;
Drk3328-nanopi-r2c.dts29 motorcomm,clk-out-frequency-hz = <125000000>;
30 motorcomm,keep-pll-enabled;
31 motorcomm,auto-sleep-disabled;
/linux-6.12.1/drivers/net/phy/
Dmotorcomm.c3 * Motorcomm 8511/8521/8531/8531S/8821 PHY driver.
986 if (!of_property_read_u32(node, "motorcomm,rx-clk-drv-microamp", &val)) { in yt8531_set_ds()
1003 if (!of_property_read_u32(node, "motorcomm,rx-data-drv-microamp", &val)) { in yt8531_set_ds()
1086 if (of_property_read_u32(node, "motorcomm,clk-out-frequency-hz", &freq)) in yt8521_probe()
1158 if (of_property_read_u32(node, "motorcomm,clk-out-frequency-hz", &freq)) in yt8531_probe()
1665 if (of_property_read_bool(node, "motorcomm,auto-sleep-disabled")) { in yt8521_config_init()
1673 if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { in yt8521_config_init()
1693 if (of_property_read_bool(node, "motorcomm,auto-sleep-disabled")) { in yt8531_config_init()
1702 if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { in yt8531_config_init()
1724 * keep "motorcomm,tx-clk-adj-enabled" not exist in dts when the soc is not
[all …]
DKconfig317 tristate "Motorcomm PHYs"
319 Enables support for Motorcomm network PHYs.
DMakefile86 obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm.o
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h618-orangepi-zero3.dts27 motorcomm,clk-out-frequency-hz = <125000000>;
/linux-6.12.1/Documentation/devicetree/bindings/
Dvendor-prefixes.yaml974 "^motorcomm,.*":
975 description: MotorComm, Inc.
/linux-6.12.1/
DMAINTAINERS15667 MOTORCOMM PHY DRIVER
15671 F: Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml
15672 F: drivers/net/phy/motorcomm.c