Home
last modified time | relevance | path

Searched +full:mhuv2 +full:- +full:tx (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/mailbox/
Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/arm,mhuv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM MHUv2 Mailbox Controller
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
19 Given the unidirectional nature of the controller, an MHUv2 mailbox may only
33 - Data-transfer: Each transfer is made of one or more words, using one or more
[all …]
/linux-6.12.1/drivers/mailbox/
Darm_mhuv2.c1 // SPDX-License-Identifier: GPL-2.0
3 * ARM Message Handling Unit Version 2 (MHUv2) driver.
8 * An MHUv2 mailbox controller can provide up to 124 channel windows (each 32
10 * protocol modes: data-transfer and doorbell, to be used on those channel
16 * device tree bindings of the ARM MHUv2 controller for more details.
19 * hardware - mainly the number of channel windows implemented by the platform,
22 * The MHUv2 controller can work both as a sender and receiver, but the driver
36 /* ====== MHUv2 Registers ====== */
45 #define LSB_MASK(n) ((1 << (n * __CHAR_BIT__)) - 1)
46 #define MHUV2_PROTOCOL_PROP "arm,mhuv2-protocols"
[all …]
Darm_mhuv3.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on ARM MHUv2 driver.
84 #define fcgi_spt BIT(10) // MBX-only
129 /*-- MBX-only registers --*/
134 /*-- End of MBX-only ---- */
137 /*-- MBX-only registers --*/
143 /*-- End of MBX-only ---- */
252 * struct mhuv3_protocol_ops - MHUv3 operations
256 * @read_data: Read available Sender in-band LE data (if any).
257 * @rx_complete: Acknowledge data reception to the Sender. Any out-of-band data
[all …]
/linux-6.12.1/arch/arm64/boot/dts/arm/
Dcorstone1000.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
21 stdout-path = "serial0:115200n8";
25 #address-cells = <1>;
26 #size-cells = <0>;
30 compatible = "arm,cortex-a35";
32 next-level-cache = <&L2_0>;
[all …]
/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]