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Searched +full:mhu +full:- +full:tx (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/mailbox/
Darm_mhuv2.c1 // SPDX-License-Identifier: GPL-2.0
10 * protocol modes: data-transfer and doorbell, to be used on those channel
19 * hardware - mainly the number of channel windows implemented by the platform,
45 #define LSB_MASK(n) ((1 << (n * __CHAR_BIT__)) - 1)
46 #define MHUV2_PROTOCOL_PROP "arm,mhuv2-protocols"
94 u8 pad1[0x0C - 0x04];
99 u8 pad2[0x20 - 0x1C];
114 u8 pad[0xFC8 - 0xFB0];
124 u8 reserved0[0x10 - 0x0C];
128 u8 pad[0x20 - 0x1C];
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Darm_mhuv3.c1 // SPDX-License-Identifier: GPL-2.0
84 #define fcgi_spt BIT(10) // MBX-only
129 /*-- MBX-only registers --*/
134 /*-- End of MBX-only ---- */
137 /*-- MBX-only registers --*/
143 /*-- End of MBX-only ---- */
252 * struct mhuv3_protocol_ops - MHUv3 operations
256 * @read_data: Read available Sender in-band LE data (if any).
257 * @rx_complete: Acknowledge data reception to the Sender. Any out-of-band data
268 int (*rx_startup)(struct mhuv3 *mhu, struct mbox_chan *chan);
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/linux-6.12.1/Documentation/devicetree/bindings/mailbox/
Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
14 The Arm Message Handling Unit (MHU) Version 2 is a mailbox controller that has
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
20 be written to or read from. If a pair of MHU controllers is implemented
27 An MHU controller must be specified along with the supported transport
33 - Data-transfer: Each transfer is made of one or more words, using one or more
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Darm,mhu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM MHU Mailbox Controller
10 - Jassi Brar <jaswinder.singh@linaro.org>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
14 independent channels/links to communicate with remote processor(s). MHU links
21 The MHU hardware also allows operations in doorbell mode. The MHU drives the
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
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/linux-6.12.1/arch/arm64/boot/dts/arm/
Djuno-scmi.dtsi3 power-domains = <&scmi_devpd 8>;
7 power-domains = <&scmi_devpd 8>;
11 power-domains = <&scmi_devpd 8>;
15 power-domains = <&scmi_devpd 8>;
19 power-domains = <&scmi_devpd 8>;
23 power-domains = <&scmi_devpd 8>;
27 power-domains = <&scmi_devpd 8>;
31 power-domains = <&scmi_devpd 8>;
42 /delete-node/ scpi;
47 mbox-names = "tx", "rx";
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/linux-6.12.1/arch/arm64/boot/dts/amlogic/
Dmeson-gx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
29 reserved-memory {
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Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
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/linux-6.12.1/drivers/firmware/
Darm_scpi.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * and the Application Processors(AP). The Message Handling Unit(MHU)
7 * provides a mechanism for inter-processor communication between SCP's
210 -1, /* GET_CLOCK_INFO */
219 -1, /* SET_DEVICE_PWR_STATE */
220 -1, /* GET_DEVICE_PWR_STATE */
262 * The SCP firmware only executes in little-endian mode, so any buffers
263 * shared through SCPI should have their contents converted to little-endian
335 -EINVAL, /* SCPI_ERR_PARAM */
336 -ENOEXEC, /* SCPI_ERR_ALIGN */
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/linux-6.12.1/drivers/firmware/arm_scmi/
Ddriver.c1 // SPDX-License-Identifier: GPL-2.0
6 * and the Application Processors(AP). The Message Handling Unit(MHU)
7 * provides a mechanism for inter-processor communication between SCP's
14 * Copyright (C) 2018-2024 ARM Ltd.
25 #include <linux/io-64-nonatomic-hi-lo.h>
60 * struct scmi_xfers_info - Structure to manage transfer information
68 * a number of xfers equal to the maximum allowed in-flight
71 * currently in-flight messages.
82 * struct scmi_protocol_instance - Describe an initialized protocol instance.
85 * @gid: A reference for per-protocol devres management.
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