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Searched +full:meson8 +full:- +full:ddr +full:- +full:clkc (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/clock/
Damlogic,meson8-ddr-clkc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic DDR Clock Controller
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
15 - amlogic,meson8-ddr-clkc
16 - amlogic,meson8b-ddr-clkc
24 clock-names:
26 - const: xtal
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Damlogic,meson8b-clkc.txt1 * Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit
3 The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and
8 - compatible: must be one of:
9 - "amlogic,meson8-clkc" for Meson8 (S802) SoCs
10 - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
11 - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
14 - clocks: list of clock phandles, one for each entry in clock-names
15 - clock-names: should contain the following:
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/linux-6.12.1/drivers/clk/meson/
Dmeson8-ddr.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Amlogic Meson8 DDR clock controller
8 #include <dt-bindings/clock/meson8-ddr-clkc.h>
10 #include <linux/clk-provider.h>
13 #include "clk-regmap.h"
14 #include "clk-pll.h"
111 regmap = devm_regmap_init_mmio(&pdev->dev, base, in meson8_ddr_clkc_probe()
118 meson8_ddr_clk_regmaps[i]->map = regmap; in meson8_ddr_clkc_probe()
124 ret = devm_clk_hw_register(&pdev->dev, hw); in meson8_ddr_clkc_probe()
126 dev_err(&pdev->dev, "Clock registration failed\n"); in meson8_ddr_clkc_probe()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
4 obj-$(CONFIG_COMMON_CLK_MESON_CLKC_UTILS) += meson-clkc-utils.o
5 obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o
6 obj-$(CONFIG_COMMON_CLK_MESON_CPU_DYNDIV) += clk-cpu-dyndiv.o
7 obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o
8 obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o
9 obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
10 obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o
11 obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o
12 obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o
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/linux-6.12.1/arch/arm/boot/dts/amlogic/
Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
16 model = "Amlogic Meson8 SoC";
17 compatible = "amlogic,meson8";
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Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
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