/linux-6.12.1/drivers/mtd/maps/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 7 bool "Support non-linear mappings of flash chips" 13 tristate "Flash device in physical memory map" 17 ROM driver code to communicate with chips which are mapped 18 physically into the CPU's memory. You will need to configure 21 with config options or at run-time. 42 This is the physical memory location at which the flash chips 43 are mapped on your particular target board. Refer to the 44 memory map which should hopefully be in the documentation for 54 physical memory map between the chips, this could be larger [all …]
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/linux-6.12.1/Documentation/admin-guide/mm/ |
D | pagemap.rst | 12 physical frame each virtual page is mapped to. It contains one 64-bit 16 * Bits 0-54 page frame number (PFN) if present 17 * Bits 0-4 swap type if swapped 18 * Bits 5-54 swap offset if swapped 19 * Bit 55 pte is soft-dirty (see 20 Documentation/admin-guide/mm/soft-dirty.rst) 21 * Bit 56 page exclusively mapped (since 4.2) 22 * Bit 57 pte is uffd-wp write-protected (since 5.13) (see 23 Documentation/admin-guide/mm/userfaultfd.rst) 24 * Bits 58-60 zero [all …]
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D | nommu-mmap.rst | 2 No-MMU memory mapping support 5 The kernel has limited support for memory mapping under no-MMU conditions, such 6 as are used in uClinux environments. From the userspace point of view, memory 12 Memory mapping behaviour also involves the way fork(), vfork(), clone() and 16 The behaviour is similar between the MMU and no-MMU cases, but not identical; 21 In the MMU case: VM regions backed by arbitrary pages; copy-on-write 24 In the no-MMU case: VM regions backed by arbitrary contiguous runs of 31 the no-MMU case doesn't support these, behaviour is identical to 39 In the no-MMU case: 41 - If one exists, the kernel will re-use an existing mapping to the [all …]
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D | idle_page_tracking.rst | 8 The idle page tracking feature allows to track which memory pages are being 11 account when configuring the workload parameters, setting memory cgroup limits, 22 Currently, it consists of the only read-write file, 25 The file implements a bitmap where each bit corresponds to a memory page. The 26 bitmap is represented by an array of 8-byte integers, and the page at PFN #i is 27 mapped to bit #i%64 of array element #i/64, byte order is native. When a bit is 34 the page by writing to the file. A value written to the file is OR-ed with the 37 Only accesses to user memory pages are tracked. These are pages mapped to a 46 -EINVAL if you are not starting the read/write on an 8-byte boundary, or 48 this file beyond max PFN will return -ENXIO. [all …]
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D | transhuge.rst | 8 Performance critical computing applications dealing with large memory 11 using huge pages for the backing of virtual memory with huge pages 15 Currently THP only works for anonymous memory mappings and tmpfs/shmem. 26 requiring larger clear-page copy-page in page faults which is a 30 only matters the first time the memory is accessed for the lifetime of 31 a memory mapping. The second long lasting and much more important 32 factor will affect all subsequent accesses to the memory for the whole 41 memory in turn reducing the number of TLB misses. With 42 virtualization and nested pagetables the TLB can be mapped of 48 Modern kernels support "multi-size THP" (mTHP), which introduces the [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/ |
D | st,stih4xx.txt | 3 - sti-vtg: video timing generator 5 - compatible: "st,vtg" 6 - reg: Physical base address of the IP registers and length of memory mapped region. 8 - interrupts : VTG interrupt number to the CPU. 9 - st,slave: phandle on a slave vtg 11 - sti-vtac: video timing advanced inter dye communication Rx and TX 13 - compatible: "st,vtac-main" or "st,vtac-aux" 14 - reg: Physical base address of the IP registers and length of memory mapped region. 15 - clocks: from common clock binding: handle hardware IP needed clocks, the 17 See ../clocks/clock-bindings.txt for details. [all …]
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/linux-6.12.1/mm/ |
D | zpool.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * zpool memory storage api 7 * This is a common frontend for memory storage pool implementations. 8 * Typically, this is used to store compressed memory. 30 * zpool_register_driver() - register a zpool implementation. 36 atomic_set(&driver->refcount, 0); in zpool_register_driver() 37 list_add(&driver->list, &drivers_head); in zpool_register_driver() 43 * zpool_unregister_driver() - unregister a zpool implementation. 57 refcount = atomic_read(&driver->refcount); in zpool_unregister_driver() 60 ret = -EBUSY; in zpool_unregister_driver() [all …]
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/linux-6.12.1/drivers/net/ethernet/cavium/liquidio/ |
D | octeon_mem_ops.h | 7 * Copyright (c) 2003-2016 Cavium, Inc. 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 21 * \brief Host Driver: Routines used to read/write Octeon memory. 27 /** Read a 64-bit value from a BAR1 mapped core memory address. 28 * @param oct - pointer to the octeon device. 29 * @param core_addr - the address to read from. 32 * in which core_addr is mapped. 34 * @return 64-bit value read from Core memory 38 /** Read a 32-bit value from a BAR1 mapped core memory address. 39 * @param oct - pointer to the octeon device. [all …]
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/linux-6.12.1/drivers/scsi/lpfc/ |
D | lpfc_mem.c | 4 * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term * 6 * Copyright (C) 2004-2014 Emulex. All rights reserved. * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 46 #define LPFC_MEM_POOL_SIZE 64 /* max elem in non-DMA safety pool */ 48 #define LPFC_RRQ_POOL_SIZE 256 /* max elements in non-DMA pool */ 49 #define LPFC_MBX_POOL_SIZE 256 /* max elements in MBX non-DMA pool */ 53 * @phba: HBA to free memory for 57 * free routine to fully release all associated memory. 66 if (phba->sli_rev == LPFC_SLI_REV4 && in lpfc_mem_free_sli_mbox() [all …]
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/linux-6.12.1/Documentation/arch/loongarch/ |
D | introduction.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are 8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit 9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels 12 instruction set, virtual memory and some other topics of LoongArch. 22 ---- 24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32 25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers 26 are not architecturally special. (Except ``$r1``, which is hard-wired as the 30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`: [all …]
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/linux-6.12.1/Documentation/core-api/ |
D | dma-api.rst | 8 of the API (and actual examples), see Documentation/core-api/dma-api-howto.rst. 11 Part II describes extensions for supporting non-consistent memory 13 non-consistent platforms (this is usually only legacy platforms) you 16 Part I - dma_API 17 ---------------- 19 To get the dma_API, you must #include <linux/dma-mapping.h>. This 27 Part Ia - Using large DMA-coherent buffers 28 ------------------------------------------ 36 Consistent memory is memory for which a write by either the device or 40 devices to read that memory.) [all …]
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/linux-6.12.1/Documentation/userspace-api/media/v4l/ |
D | mmap.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 7 Streaming I/O (Memory Mapping) 14 streaming methods, to determine if the memory mapping flavor is 16 with the memory type set to ``V4L2_MEMORY_MMAP``. 19 between application and driver, the data itself is not copied. Memory 20 mapping is primarily intended to map buffers in device memory into the 21 application's address space. Device memory can be for example the video 22 memory on a graphics card with a video capture add-on. However, being 24 drivers support streaming as well, allocating buffers in DMA-able main 25 memory. [all …]
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D | vidioc-reqbufs.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 13 VIDIOC_REQBUFS - Initiate Memory Mapping, User Pointer I/O or DMA buffer I/O 34 This ioctl is used to initiate :ref:`memory mapped <mmap>`, 36 Memory mapped buffers are located in device memory and must be allocated 37 with this ioctl before they can be mapped into the application's address 48 the desired number of buffers, ``memory`` must be set to the requested 53 requested, even zero, when the driver runs out of free memory. A larger 62 buffers. Note that if any buffers are still mapped or exported via DMABUF, 78 .. flat-table:: struct v4l2_requestbuffers 79 :header-rows: 0 [all …]
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D | func-mmap.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 4 .. _func-mmap: 13 v4l2-mmap - Map device memory into application address space 18 .. code-block:: c 36 Length of the memory area to map. This must be the same value as 39 single-planar API, and the same value as returned by the driver in 41 the multi-planar API. 44 The ``prot`` argument describes the desired memory protection. 57 #. Device memory accesses (e. g. the memory on a graphics card 59 compared to main memory accesses, or reads may be significantly [all …]
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/linux-6.12.1/include/xen/interface/ |
D | memory.h | 1 /* SPDX-License-Identifier: MIT */ 3 * memory.h 5 * Memory reservation and information. 16 * Increase or decrease the specified domain's memory reservation. Returns a 17 * -ve errcode on failure, or the # extents successfully allocated or freed. 31 * IN: GPFN bases of extents to populate with memory 43 * I/O devices often have a 32-bit limitation even in 64-bit systems). If 59 * An atomic exchange of memory pages. If return code is zero then 60 * @out.extent_list provides GMFNs of the newly-allocated memory. 68 * [IN] Details of memory extents to be exchanged (GMFN bases). [all …]
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/linux-6.12.1/Documentation/userspace-api/media/dvb/ |
D | dmx-reqbufs.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 13 DMX_REQBUFS - Initiate Memory Mapping and/or DMA buffer I/O 36 This ioctl is used to initiate a memory mapped or DMABUF based demux I/O. 38 Memory mapped buffers are located in device memory and must be allocated 39 with this ioctl before they can be mapped into the application's address 54 … be smaller than the number requested, even zero, when the driver runs out of free memory. A larger 63 buffers, however this cannot succeed when any buffers are still mapped. 70 On success 0 is returned, on error -1 and the ``errno`` variable is set 72 :ref:`Generic Error Codes <gen-errors>` chapter.
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D | dmx-mmap.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 4 .. _dmx-mmap: 13 dmx-mmap - Map device memory into application address space 20 .. code-block:: c 38 Length of the memory area to map. This must be a multiple of the 42 The ``prot`` argument describes the desired memory protection. 49 The ``flags`` parameter specifies the type of the mapped object, 50 mapping options and whether modifications made to the mapped copy of 61 ``MAP_SHARED`` allows applications to share the mapped memory with 62 other (e. g. child-) processes. [all …]
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/linux-6.12.1/arch/um/kernel/ |
D | physmem.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) 12 #include <as-layout.h> 19 static int physmem_fd = -1; 51 if (err == -ENOMEM) in map_memory() 54 "memory size>/4096\n"); in map_memory() 61 * setup_physmem() - Setup physical memory for UML 62 * @start: Start address of the physical kernel memory, 64 * @reserve_end: end address of the physical kernel memory. 65 * @len: Length of total physical memory that should be mapped/made [all …]
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/linux-6.12.1/arch/sh/mm/ |
D | ioremap.c | 5 * (C) Copyright 2005 - 2010 Paul Mundt 7 * Re-map IO memory to kernel address space so that we can access it. 8 * This is needed for high PCI addresses that aren't mapped in the 9 * 640k-1MB IO memory area on PC's 31 * On 32-bit SH, we traditionally have the whole physical address space mapped 42 phys_addr_t last_addr = offset + size - 1; in __ioremap_29bit() 46 * mapped. Uncached access for P1 addresses are done through P2. in __ioremap_29bit() 47 * In the P3 case or for addresses outside of the 29-bit space, in __ioremap_29bit() 65 /* P4 above the store queues are always mapped. */ in __ioremap_29bit() 78 void __iomem *mapped; in ioremap_prot() local [all …]
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/linux-6.12.1/drivers/media/pci/cx18/ |
D | cx18-io.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * cx18 driver PCI memory mapped IO access routines 12 #include "cx18-driver.h" 23 /* Non byteswapping memory mapped IO */ 45 /* Normal memory mapped IO */ 136 /* Access "register" region of CX23418 memory mapped I/O */ 139 cx18_writel_noretry(cx, val, cx->reg_mem + reg); in cx18_write_reg_noretry() 144 cx18_writel(cx, val, cx->reg_mem + reg); in cx18_write_reg() 150 cx18_writel_expect(cx, val, cx->reg_mem + reg, eval, mask); in cx18_write_reg_expect() 155 return cx18_readl(cx, cx->reg_mem + reg); in cx18_read_reg() [all …]
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/linux-6.12.1/drivers/virtio/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 78 If disabled, you get a slightly smaller, non-transitional driver, 106 This driver provides access to virtio-pmem devices, storage devices 107 that are mapped into the physical address space - similar to NVDIMMs 108 - with a virtio-based flushing interface. 119 of memory within a KVM guest. 132 This driver provides access to virtio-mem paravirtualized memory 133 devices, allowing to hotplug and hotunplug memory. 135 This driver currently only supports x86-64 and arm64. Although it 136 should compile on other architectures that implement memory [all …]
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/linux-6.12.1/mm/kmsan/ |
D | hooks.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * These functions handle creation of KMSAN metadata for memory allocations. 7 * Copyright (C) 2018-2022 Google LLC 13 #include <linux/dma-direction.h> 55 * There's a ctor or this is an RCU cache - do nothing. The memory in kmsan_slab_alloc() 58 if (s->ctor || (s->flags & SLAB_TYPESAFE_BY_RCU)) in kmsan_slab_alloc() 63 kmsan_internal_unpoison_memory(object, s->object_size, in kmsan_slab_alloc() 66 kmsan_internal_poison_memory(object, s->object_size, flags, in kmsan_slab_alloc() 77 if (unlikely(s->flags & SLAB_TYPESAFE_BY_RCU)) in kmsan_slab_free() 80 * If there's a constructor, freed memory must remain in the same state in kmsan_slab_free() [all …]
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/linux-6.12.1/arch/microblaze/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 108 supply some command-line options at build time by entering them 133 aspects of kernel memory management. 141 bool "High memory support" 146 space as well as some memory mapped IO. That means that, if you 147 have a large amount of physical memory and/or IO, not all of the 148 memory can be "permanently mapped" by the kernel. The physical 149 memory that is not permanently mapped is called "high memory". 154 bool "Set maximum low memory" 157 This option allows you to set the maximum amount of memory which [all …]
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/linux-6.12.1/Documentation/scsi/ |
D | g_NCR5380.rst | 1 .. SPDX-License-Identifier: GPL-2.0 16 memory mapped modes. 25 The NCR53c400 does not support DMA but it does have Pseudo-DMA which is 38 base=xx[,...] the port or base address(es) (for port or memory mapped, resp.) 50 These old-style parameters can support only one card: 54 ncr_addr=xx the port or base address (for port or memory 55 mapped, resp.) 71 E.g. a port mapped NCR5380 board, driver to probe for IRQ:: 79 E.g. a memory mapped NCR53C400 board with no IRQ:: 87 E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ
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/linux-6.12.1/Documentation/mm/ |
D | unevictable-lru.rst | 11 This document describes the Linux memory manager's "Unevictable LRU" 19 details - the "what does it do?" - by reading the code. One hopes that the 31 memory x86_64 systems. 33 To illustrate this with an example, a non-NUMA x86_64 platform with 128GB of 34 main memory will have over 32 million 4k pages in a single node. When a large 47 * Those mapped into SHM_LOCK'd shared memory regions. 49 * Those mapped into VM_LOCKED [mlock()ed] VMAs. 56 ------------------------------ 58 The Unevictable LRU folio list is a lie. It was never an LRU-ordered 59 list, but a companion to the LRU-ordered anonymous and file, active and [all …]
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