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/linux-6.12.1/drivers/net/mdio/
Dmdio-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * GPIO based MDIO bitbang driver.
7 * by Laurent Pinchart <laurentp@cse-semaphore.com>
20 #include <linux/gpio/consumer.h>
22 #include <linux/mdio-bitbang.h>
23 #include <linux/mdio-gpio.h>
26 #include <linux/platform_data/mdio-gpio.h>
32 struct gpio_desc *mdc, *mdio, *mdo; member
38 bitbang->mdc = devm_gpiod_get_index(dev, NULL, MDIO_GPIO_MDC, in mdio_gpio_get_data()
40 if (IS_ERR(bitbang->mdc)) in mdio_gpio_get_data()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
50 tristate "Allwinner sun4i MDIO interface support"
53 This driver supports the MDIO interface found in the network
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Makefile for Linux MDIO bus drivers
4 obj-$(CONFIG_ACPI_MDIO) += acpi_mdio.o
5 obj-$(CONFIG_FWNODE_MDIO) += fwnode_mdio.o
6 obj-$(CONFIG_OF_MDIO) += of_mdio.o
8 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
9 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
10 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
11 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
12 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
[all …]
Dmdio-mux-gpio.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/gpio/consumer.h>
8 #include <linux/mdio-mux.h>
15 #define DRV_DESCRIPTION "GPIO controlled MDIO bus multiplexer driver"
33 gpiod_set_array_value_cansleep(s->gpios->ndescs, s->gpios->desc, in mdio_mux_gpio_switch_fn()
34 s->gpios->info, values); in mdio_mux_gpio_switch_fn()
45 gpios = devm_gpiod_get_array(&pdev->dev, NULL, GPIOD_OUT_LOW); in mdio_mux_gpio_probe()
49 s = devm_kzalloc(&pdev->dev, sizeof(*s), GFP_KERNEL); in mdio_mux_gpio_probe()
51 return -ENOMEM; in mdio_mux_gpio_probe()
53 s->gpios = gpios; in mdio_mux_gpio_probe()
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/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/
Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
18 MDIO or SPI.
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
22 not use the MDIO protocol. This binding defines how to specify the
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
[all …]
Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
19 the MDIO master is used for communication. Mixed external and internal
20 mdio-bus configurations are not supported by the hardware.
27 - enum:
[all …]
/linux-6.12.1/drivers/pinctrl/mvebu/
Dpinctrl-ac5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "pinctrl-mvebu.h"
21 MPP_FUNCTION(0, "gpio", NULL),
25 MPP_FUNCTION(0, "gpio", NULL),
29 MPP_FUNCTION(0, "gpio", NULL),
33 MPP_FUNCTION(0, "gpio", NULL),
37 MPP_FUNCTION(0, "gpio", NULL),
43 MPP_FUNCTION(0, "gpio", NULL),
49 MPP_FUNCTION(0, "gpio", NULL),
54 MPP_FUNCTION(0, "gpio", NULL),
[all …]
Dpinctrl-armada-cp110.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
42 MPP_FUNCTION(0, "gpio", NULL),
51 MPP_FUNCTION(10, "ge", "mdio")),
53 MPP_FUNCTION(0, "gpio", NULL),
64 MPP_FUNCTION(0, "gpio", NULL),
76 MPP_FUNCTION(0, "gpio", NULL),
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmdio-mux-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. One or more GPIO
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
[all …]
Dmdio-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO on GPIOs
10 - Andrew Lunn <andrew@lunn.ch>
11 - Heiner Kallweit <hkallweit1@gmail.com>
12 - Russell King <linux@armlinux.org.uk>
15 - $ref: mdio.yaml#
20 - virtual,mdio-gpio
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO Bus Common Properties
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
34 - Core clocks
35 - 0 0 APLL
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/linux-6.12.1/arch/arm/boot/dts/nxp/vf/
Dvf610-zii-dev-rev-c.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
[all …]
Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
[all …]
Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt7620-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,mt7620-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
Dralink,rt305x-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt305x-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt305x-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
Dralink,rt3352-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt3352-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt3352-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
Dralink,rt3883-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt3883-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
20 const: ralink,rt3883-pinctrl
23 '-pins$':
28 '^(.*-)?pinmux$':
31 $ref: pinmux-node.yaml#
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dmscc,ocelot.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
18 The switch family is a multi-port networking switch that supports many
19 interfaces. Additionally, the device can perform pin control, MDIO buses, and
20 external GPIO expanders.
25 - mscc,vsc7512
30 "#address-cells":
[all …]
/linux-6.12.1/arch/arm/boot/dts/moxa/
Dmoxart.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
7 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 #address-cells = <1>;
29 #size-cells = <0>;
[all …]
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-xway.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
11 #include <linux/gpio/driver.h>
21 #include "pinctrl-lantiq.h"
110 /* --------- ase related code --------- */
115 MFP_XWAY(GPIO0, GPIO, EXIN, MII, TDM),
116 MFP_XWAY(GPIO1, GPIO, STP, DFE, EBU),
117 MFP_XWAY(GPIO2, GPIO, STP, DFE, EPHY),
118 MFP_XWAY(GPIO3, GPIO, STP, EPHY, EBU),
[all …]
/linux-6.12.1/drivers/net/phy/
Dfixed_phy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Fixed MDIO bus (MDIO bus emulation with fixed PHYs)
8 * Copyright (c) 2006-2007 MontaVista Software, Inc.
21 #include <linux/gpio/consumer.h>
51 struct phy_device *phydev = dev->phydev; in fixed_phy_change_carrier()
54 if (!phydev || !phydev->mdio.bus) in fixed_phy_change_carrier()
55 return -EINVAL; in fixed_phy_change_carrier()
57 list_for_each_entry(fp, &fmb->phys, node) { in fixed_phy_change_carrier()
58 if (fp->addr == phydev->mdio.addr) { in fixed_phy_change_carrier()
59 fp->no_carrier = !new_carrier; in fixed_phy_change_carrier()
[all …]
/linux-6.12.1/arch/arm/boot/dts/gemini/
Dgemini-dlink-dns-313.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/thermal/thermal.h>
13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
14 compatible = "dlink,dns-313", "cortina,gemini";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
[all …]

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