| /linux-6.12.1/drivers/clk/mmp/ |
| D | clk-frac.c | 35 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_round_rate()
54 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_recalc_rate() local
61 num = (val >> masks->num_shift) & masks->num_mask; in clk_factor_recalc_rate()
64 den = (val >> masks->den_shift) & masks->den_mask; in clk_factor_recalc_rate()
71 do_div(rate, num * factor->masks->factor); in clk_factor_recalc_rate()
81 struct mmp_clk_factor_masks *masks = factor->masks; in clk_factor_set_rate() local
90 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_set_rate()
103 val &= ~(masks->num_mask << masks->num_shift); in clk_factor_set_rate()
104 val |= (factor->ftbl[i].num & masks->num_mask) << masks->num_shift; in clk_factor_set_rate()
106 val &= ~(masks->den_mask << masks->den_shift); in clk_factor_set_rate()
[all …]
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| /linux-6.12.1/drivers/clk/spear/ |
| D | clk-aux-synth.c | 77 eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask; in clk_aux_recalc_rate()
78 if (eqn == aux->masks->eq1_mask) in clk_aux_recalc_rate()
82 num = (val >> aux->masks->xscale_sel_shift) & in clk_aux_recalc_rate()
83 aux->masks->xscale_sel_mask; in clk_aux_recalc_rate()
86 den *= (val >> aux->masks->yscale_sel_shift) & in clk_aux_recalc_rate()
87 aux->masks->yscale_sel_mask; in clk_aux_recalc_rate()
111 ~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift); in clk_aux_set_rate()
112 val |= (rtbl[i].eq & aux->masks->eq_sel_mask) << in clk_aux_set_rate()
113 aux->masks->eq_sel_shift; in clk_aux_set_rate()
114 val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift); in clk_aux_set_rate()
[all …]
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| /linux-6.12.1/sound/soc/codecs/ |
| D | tscs42xx.h | 124 /* Field Masks */
132 /* Register Masks */
147 /* Field Masks */
155 /* Register Masks */
170 /* Field Masks */
178 /* Register Masks */
195 /* Field Masks */
203 /* Register Masks */
220 /* Field Masks */
228 /* Register Masks */
[all …]
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| D | cs42l56.h | 60 /* Device ID and Rev ID Masks */
66 /* Power bit masks */
78 /* serial port and clk masks */
96 /* Class H and misc ctl masks */
112 /* Playback Capture ctl masks */
130 /* Beep masks */
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| /linux-6.12.1/lib/ |
| D | group_cpus.c | 47 cpumask_var_t *masks; in alloc_node_to_cpumask() local
50 masks = kcalloc(nr_node_ids, sizeof(cpumask_var_t), GFP_KERNEL); in alloc_node_to_cpumask()
51 if (!masks) in alloc_node_to_cpumask()
55 if (!zalloc_cpumask_var(&masks[node], GFP_KERNEL)) in alloc_node_to_cpumask()
59 return masks; in alloc_node_to_cpumask()
63 free_cpumask_var(masks[node]); in alloc_node_to_cpumask()
64 kfree(masks); in alloc_node_to_cpumask()
68 static void free_node_to_cpumask(cpumask_var_t *masks) in free_node_to_cpumask() argument
73 free_cpumask_var(masks[node]); in free_node_to_cpumask()
74 kfree(masks); in free_node_to_cpumask()
[all …]
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| /linux-6.12.1/kernel/irq/ |
| D | affinity.c | 19 * irq_create_affinity_masks - Create affinity masks for multiqueue spreading
29 struct irq_affinity_desc *masks = NULL; in irq_create_affinity_masks() local
59 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in irq_create_affinity_masks()
60 if (!masks) in irq_create_affinity_masks()
65 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
77 kfree(masks); in irq_create_affinity_masks()
82 cpumask_copy(&masks[curvec + j].mask, &result[j]); in irq_create_affinity_masks()
95 cpumask_copy(&masks[curvec].mask, irq_default_affinity); in irq_create_affinity_masks()
99 masks[i].is_managed = 1; in irq_create_affinity_masks()
101 return masks; in irq_create_affinity_masks()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| D | dcn10_dpp_cm.c | 119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
197 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in read_gamut_remap()
199 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in read_gamut_remap()
282 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
284 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
329 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dpp1_cm_get_reg_field()
331 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
333 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dpp1_cm_get_reg_field()
335 reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
[all …]
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| /linux-6.12.1/security/landlock/ |
| D | ruleset.h | 27 * entries when we need to get the absolute handled access masks.
44 /* Ruleset access masks. */
52 struct access_masks masks; member
57 static_assert(sizeof(typeof_member(union access_masks_all, masks)) ==
279 * Returns: an access_masks result of the OR of all the domain's access masks.
289 .masks = domain->access_masks[layer_level], in landlock_union_access_masks()
295 return matches.masks; in landlock_union_access_masks()
301 * in @masks
304 * @masks: access masks
306 * Returns: @domain if any access rights specified in @masks is handled, or
[all …]
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| /linux-6.12.1/drivers/net/ethernet/ezchip/ |
| D | nps_enet.h | 35 /* Tx control register masks and shifts */
43 /* Rx control register masks and shifts */
53 /* Interrupt enable for data buffer events register masks and shifts */
59 /* Gbps Eth MAC Configuration 0 register masks and shifts */
93 /* Gbps Eth MAC Configuration 1 register masks and shifts */
103 /* Gbps Eth MAC Configuration 2 register masks and shifts */
119 /* Gbps Eth MAC Configuration 3 register masks and shifts */
141 /* GE MAC, PCS reset control register masks and shifts */
147 /* Tx phase sync FIFO control register masks and shifts */
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| /linux-6.12.1/drivers/net/dsa/microchip/ |
| D | ksz8.c | 275 const u32 *masks; in ksz8_r_mib_cnt() local
282 masks = dev->info->masks; in ksz8_r_mib_cnt()
297 if (check & masks[MIB_COUNTER_VALID]) { in ksz8_r_mib_cnt()
299 if (check & masks[MIB_COUNTER_OVERFLOW]) in ksz8_r_mib_cnt()
311 const u32 *masks; in ksz8795_r_mib_pkt() local
318 masks = dev->info->masks; in ksz8795_r_mib_pkt()
335 if (check & masks[MIB_COUNTER_VALID]) { in ksz8795_r_mib_pkt()
344 if (check & masks[MIB_COUNTER_OVERFLOW]) { in ksz8795_r_mib_pkt()
350 if (check & masks[MIB_COUNTER_OVERFLOW]) in ksz8795_r_mib_pkt()
497 const u32 *masks; in ksz8_valid_dyn_entry() local
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| D | dcn30_dwb_cm.c | 53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
60 reg->masks.exp_region0_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
62 reg->masks.exp_region1_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
64 reg->masks.exp_region1_num_segments = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
67 reg->masks.field_region_end = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
69 reg->masks.field_region_end_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
71 reg->masks.field_region_end_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
73 reg->masks.field_region_linear_slope = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_SLOPE_B; in dwb3_get_reg_field_ogam()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| D | dcn30_dpp_cm.c | 174 reg->masks.field_region_start_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_BASE_B; in dpp3_gamcor_reg_field()
176 reg->masks.field_offset = dpp->tf_mask->CM_GAMCOR_RAMA_OFFSET_B; in dpp3_gamcor_reg_field()
179 reg->masks.exp_region0_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_LUT_OFFSET; in dpp3_gamcor_reg_field()
181 reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
183 reg->masks.exp_region1_lut_offset = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_LUT_OFFSET; in dpp3_gamcor_reg_field()
185 reg->masks.exp_region1_num_segments = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp3_gamcor_reg_field()
188 reg->masks.field_region_end = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_B; in dpp3_gamcor_reg_field()
190 reg->masks.field_region_end_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_SLOPE_B; in dpp3_gamcor_reg_field()
192 reg->masks.field_region_end_base = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_END_BASE_B; in dpp3_gamcor_reg_field()
194 reg->masks.field_region_linear_slope = dpp->tf_mask->CM_GAMCOR_RAMA_EXP_REGION_START_SLOPE_B; in dpp3_gamcor_reg_field()
[all …]
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| /linux-6.12.1/arch/arm/mach-s3c/ |
| D | wakeup-mask.h | 27 * @masks: The list of masks to use.
28 * @nr_masks: The number of entries pointed to buy @masks.
31 * of interrupts and control bits in @masks. We do this at suspend time
36 const struct samsung_wakeup_mask *masks,
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_i2c_hw.c | 38 dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name
77 else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK) in get_channel_status()
79 else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT) in get_channel_status()
81 else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED) in get_channel_status()
83 else if (value & dce_i2c_hw->masks->DC_I2C_SW_DONE) in get_channel_status()
284 if (dce_i2c_hw->masks->DC_I2C_DDC1_START_STOP_TIMING_CNTL) in set_speed()
308 if (dce_i2c_hw->masks->DC_I2C_DDC1_CLK_EN) in setup_engine()
620 const struct dce_i2c_mask *masks) in dce_i2c_hw_construct() argument
627 dce_i2c_hw->masks = masks; in dce_i2c_hw_construct()
643 const struct dce_i2c_mask *masks) in dce100_i2c_hw_construct() argument
[all …]
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| /linux-6.12.1/drivers/media/pci/dt3155/ |
| D | dt3155.h | 69 /* CSR1 bit masks */
88 /* INT_CSR bit masks */
96 /* IIC_CSR1 bit masks */
99 /* IIC_CSR2 bit masks */
105 /* CSR2 bit masks */
115 /* CSR_EVEN/ODD bit masks */
120 /* CONFIG bit masks */
131 /* AD_CMD bit masks */
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| /linux-6.12.1/drivers/media/i2c/ |
| D | adv7393_regs.h | 92 /* Bit masks for Mode Select Register */
98 /* Bit masks for Mode Register 0 */
103 /* Bit masks for SD brightness/WSS */
107 /* Bit masks for soft reset register */
110 /* Bit masks for HD Mode Register 1 */
132 /* Bit masks for SD Mode Register 1 */
143 /* Bit masks for SD Mode Register 2 */
156 /* Bit masks for HD Mode Register 6 */
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| D | adv7343_regs.h | 84 /* Bit masks for Mode Select Register */
90 /* Bit masks for Mode Register 0 */
95 /* Bit masks for DAC output levels */
98 /* Bit masks for soft reset register */
101 /* Bit masks for HD Mode Register 1 */
123 /* Bit masks for SD Mode Register 1 */
134 /* Bit masks for SD Mode Register 2 */
147 /* Bit masks for HD Mode Register 6 */
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| /linux-6.12.1/drivers/usb/misc/ |
| D | brcmstb-usb-pinmap.c | 154 res = of_property_read_u32_index(dn, "brcm,in-masks", index++, in parse_pins()
157 dev_err(dev, "Error getting 1st brcm,in-masks for %s\n", in parse_pins()
161 res = of_property_read_u32_index(dn, "brcm,in-masks", index++, in parse_pins()
164 dev_err(dev, "Error getting 2nd brcm,in-masks for %s\n", in parse_pins()
186 res = of_property_read_u32_index(dn, "brcm,out-masks", index++, in parse_pins()
189 dev_err(dev, "Error getting 1st brcm,out-masks for %s\n", in parse_pins()
193 res = of_property_read_u32_index(dn, "brcm,out-masks", index++, in parse_pins()
196 dev_err(dev, "Error getting 2nd brcm,out-masks for %s\n", in parse_pins()
200 res = of_property_read_u32_index(dn, "brcm,out-masks", index++, in parse_pins()
203 dev_err(dev, "Error getting 3rd brcm,out-masks for %s\n", in parse_pins()
[all …]
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| /linux-6.12.1/block/ |
| D | blk-mq-cpumap.c | 20 const struct cpumask *masks; in blk_mq_map_queues() local
23 masks = group_cpus_evenly(qmap->nr_queues); in blk_mq_map_queues()
24 if (!masks) { in blk_mq_map_queues()
31 for_each_cpu(cpu, &masks[queue]) in blk_mq_map_queues()
34 kfree(masks); in blk_mq_map_queues()
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| /linux-6.12.1/drivers/virtio/ |
| D | virtio_vdpa.c | 309 struct cpumask *masks = NULL; in create_affinity_masks() local
322 masks = kcalloc(nvecs, sizeof(*masks), GFP_KERNEL); in create_affinity_masks()
323 if (!masks) in create_affinity_masks()
328 cpumask_setall(&masks[curvec]); in create_affinity_masks()
336 kfree(masks); in create_affinity_masks()
341 cpumask_copy(&masks[curvec + j], &result[j]); in create_affinity_masks()
354 cpumask_setall(&masks[curvec]); in create_affinity_masks()
356 return masks; in create_affinity_masks()
368 struct cpumask *masks; in virtio_vdpa_find_vqs() local
374 masks = create_affinity_masks(nvqs, desc ? desc : &default_affd); in virtio_vdpa_find_vqs()
[all …]
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| /linux-6.12.1/drivers/usb/gadget/udc/ |
| D | fsl_usb2_udc.h | 115 /* Frame Index Register Bit Masks */
117 /* USB CMD Register Bit Masks */
157 /* USB STS Register Bit Masks */
172 /* USB INTR Register Bit Masks */
183 /* Device Address bit masks */
187 /* endpoint list address bit masks */
190 /* PORTSCX Register Bit Masks */
254 /* otgsc Register Bit Masks */
281 /* USB MODE Register Bit Masks */
294 /* Endpoint Setup Status bit masks */
[all …]
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| /linux-6.12.1/drivers/net/ethernet/intel/ice/ |
| D | ice_flex_pipe.c | 143 /* 'dont_care' and 'nvr_mtch' masks cannot overlap */ in ice_gen_key_word()
225 * @upd: array of 8-bit masks that determine what key portion to update
226 * @dc: array of 8-bit masks that make up the don't care mask
227 * @nm: array of 8-bit masks that make up the never match mask
1172 /* Scan the enabled masks on this profile, for the specified idx */ in ice_prof_has_mask_idx()
1173 for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first + in ice_prof_has_mask_idx()
1174 hw->blk[blk].masks.count; i++) in ice_prof_has_mask_idx()
1176 if (hw->blk[blk].masks.masks[i].in_use && in ice_prof_has_mask_idx()
1177 hw->blk[blk].masks.masks[i].idx == idx) { in ice_prof_has_mask_idx()
1179 if (hw->blk[blk].masks.masks[i].mask == mask) in ice_prof_has_mask_idx()
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/usb/ |
| D | brcm,usb-pinmap.yaml | 33 brcm,in-masks:
45 brcm,out-masks:
47 description: Array of enable, value, changed and clear masks, one
66 brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
69 brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
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| /linux-6.12.1/drivers/clk/uniphier/ |
| D | clk-uniphier-mux.c | 17 const unsigned int *masks; member
27 return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index], in uniphier_clk_mux_set_parent()
44 if ((mux->masks[i] & val) == mux->vals[i]) in uniphier_clk_mux_get_parent()
77 mux->masks = data->masks; in uniphier_clk_register_mux()
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| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | tdm-slot.txt | 20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
24 the masks.
26 The explicit masks are given as array of integers, where the first
|