Searched full:msgdma (Results 1 – 18 of 18) sorted by relevance
/linux-6.12.1/drivers/net/ethernet/altera/ |
D | altera_msgdmahw.h | 2 /* Altera TSE SGDMA and MSGDMA Linux driver 9 /* mSGDMA extended descriptor format 29 /* mSGDMA descriptor control field bit definitions 70 /* mSGDMA extended descriptor stride definitions 75 /* mSGDMA dispatcher control and status register map 90 /* mSGDMA CSR status register bit definitions 116 /* mSGDMA CSR control register bit definitions 125 /* mSGDMA CSR fill level bits 131 /* mSGDMA response register map 142 /* mSGDMA response register bit definitions
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D | altera_msgdma.c | 2 /* Altera TSE SGDMA and MSGDMA Linux driver 12 /* No initialization work to do for MSGDMA */ 30 /* Reset Rx mSGDMA */ in msgdma_reset() 46 "TSE Rx mSGDMA resetting bit never cleared!\n"); in msgdma_reset() 51 /* Reset Tx mSGDMA */ in msgdma_reset() 68 "TSE Tx mSGDMA resetting bit never cleared!\n"); in msgdma_reset() 150 /* Put buffer to the mSGDMA RX FIFO
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D | altera_utils.h | 2 /* Altera TSE SGDMA and MSGDMA Linux driver
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D | altera_msgdma.h | 2 /* Altera TSE SGDMA and MSGDMA Linux driver
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D | altera_sgdma.h | 2 /* Altera TSE SGDMA and MSGDMA Linux driver
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D | altera_utils.c | 2 /* Altera TSE SGDMA and MSGDMA Linux driver
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D | altera_tse.h | 374 /* standard DMA interface for SGDMA and MSGDMA */ 407 /* mSGDMA Rx Dispatcher address space */ 412 /* mSGDMA Tx Dispatcher address space */
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D | altera_sgdmahw.h | 2 /* Altera TSE SGDMA and MSGDMA Linux driver
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D | altera_sgdma.c | 2 /* Altera TSE SGDMA and MSGDMA Linux driver
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D | altera_tse_main.c | 537 * MSGDMA method, assumes no scatter/gather support, 1513 { .compatible = "altr,tse-msgdma-1.0", .data = &altera_dtype_msgdma, },
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/linux-6.12.1/drivers/dma/ |
D | altera-msgdma.c | 3 * DMA driver for Altera mSGDMA IP core 54 /* mSGDMA descriptor control field bit definitions */ 99 /* mSGDMA extended descriptor stride definitions */ 104 /* mSGDMA dispatcher control and status register map */ 113 /* mSGDMA CSR status register bit definitions */ 130 /* mSGDMA CSR control register bit definitions */ 138 /* mSGDMA CSR fill level bits */ 145 /* mSGDMA response register map */ 149 /* mSGDMA response register bit definitions */ 191 /* mSGDMA controller */ [all …]
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D | Makefile | 16 obj-$(CONFIG_ALTERA_MSGDMA) += altera-msgdma.o
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D | Kconfig | 61 tristate "Altera / Intel mSGDMA Engine" 65 Enable support for Altera / Intel mSGDMA controller.
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/linux-6.12.1/Documentation/devicetree/bindings/dma/ |
D | altr,msgdma.yaml | 4 $id: http://devicetree.org/schemas/dma/altr,msgdma.yaml# 7 title: Altera mSGDMA IP core 13 Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA) 21 const: altr,socfpga-msgdma 58 compatible = "altr,socfpga-msgdma";
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/linux-6.12.1/Documentation/networking/device_drivers/ethernet/altera/ |
D | altera_tse.rst | 12 using the SGDMA and MSGDMA soft DMA IP components. The driver uses the 24 The Triple-Speed Ethernet, SGDMA, and MSGDMA components are all soft IP 31 Triple-Speed Ethernet instance is using an SGDMA or MSGDMA component. The 37 years as of this writing in early 2014) in favor of the MSGDMA component. 43 therefore will not perform as well compared to the MSGDMA soft IP. Please 46 Scatter-gather DMA is not supported by the SGDMA or MSGDMA at this time. 84 MSGDMA), and initiates a transmit operation. Once the transmit is complete, an 93 underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able 121 - altera_msgdma.h: MSGDMA implementation function definitions 123 - altera_msgdma.c: MSGDMA implementation [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | altr,tse.yaml | 18 - const: altr,tse-msgdma-1.0 93 - altr,tse-msgdma-1.0 115 compatible = "altr,tse-msgdma-1.0"; 139 compatible = "altr,tse-msgdma-1.0";
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/linux-6.12.1/arch/nios2/boot/dts/ |
D | 10m50_devboard.dts | 86 compatible = "altr,tse-msgdma-1.0", "altr,tse-1.0";
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/linux-6.12.1/ |
D | MAINTAINERS | 899 ALTERA MSGDMA IP CORE DRIVER 904 F: Documentation/devicetree/bindings/dma/altr,msgdma.yaml 905 F: drivers/dma/altera-msgdma.c
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