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/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am642-hummingboard-t.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
5 * DTS for SolidRun AM642 HummingBoard-T,
10 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-am642.dtsi"
16 #include "k3-am642-sr-som.dtsi"
19 model = "SolidRun AM642 HummingBoard-T";
20 compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642";
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Dk3-am654-base-board.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-am654.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "ti,am654-evm", "ti,am654";
31 stdout-path = "serial2:115200n8";
36 bootph-all;
42 reserved-memory {
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/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun7i-a20-bananapi-m1-plus.dts6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun7i-a20.dtsi"
47 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 model = "Banana Pi BPI-M1-Plus";
53 compatible = "sinovoip,bpi-m1-plus", "allwinner,sun7i-a20";
60 stdout-path = "serial0:115200n8";
63 hdmi-connector {
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Dsun8i-h3-nanopi-m1-plus.dts4 * This file is dual-licensed: you can use it either under the terms
43 #include "sun8i-h3-nanopi.dtsi"
46 model = "FriendlyArm NanoPi M1 Plus";
47 compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3";
55 reg_gmac_3v3: gmac-3v3 {
56 compatible = "regulator-fixed";
57 regulator-name = "gmac-3v3";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 startup-delay-us = <100000>;
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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Deverest,es7241.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
15 - everest,es7241
17 reset-gpios:
21 m0-gpios:
25 m1-gpios:
29 everest,sdout-pull-down:
37 VDDP-supply: true
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/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt600x-die0.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
4 * Apple T6000 / T6001 "M1 Pro" / "M1 Max".
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
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Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Apple T8103 "M1" SoC
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
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/linux-6.12.1/arch/riscv/boot/dts/canaan/
Dsipeed_maix_dock.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
17 compatible = "sipeed,maix-dock-m1", "sipeed,maix-dock-m1w",
18 "canaan,kendryte-k210";
26 stdout-path = "serial0:115200n8";
29 gpio-leds {
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/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dti,tps6598x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments 6598x Type-C Port Switch and Power Delivery controller
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
13 Texas Instruments 6598x Type-C Port Switch and Power Delivery controller
16 present on hardware with Apple SoCs such as the M1.
21 - ti,tps6598x
22 - apple,cd321x
23 - ti,tps25750
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/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Drenesas,rcar-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/renesas,rcar-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car General-Purpose Input/Output Ports (GPIO)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,gpio-r8a7778 # R-Car M1
18 - renesas,gpio-r8a7779 # R-Car H1
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/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3588-rock-5-itx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include "dt-bindings/usb/pd.h"
19 compatible = "radxa,rock-5-itx", "rockchip,rk3588";
28 stdout-path = "serial2:1500000n8";
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Drk3568-odroid-m1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,vop2.h>
15 model = "Hardkernel ODROID-M1";
16 compatible = "hardkernel,odroid-m1", "rockchip,rk3568";
29 stdout-path = "serial2:1500000n8";
32 dc_12v: dc-12v-regulator {
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Drenesas,pfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
14 On SH/R-Mobile SoCs it also acts as a GPIO controller.
19 - renesas,pfc-emev2 # EMMA Mobile EV2
20 - renesas,pfc-r8a73a4 # R-Mobile APE6
21 - renesas,pfc-r8a7740 # R-Mobile A1
22 - renesas,pfc-r8a7742 # RZ/G1H
23 - renesas,pfc-r8a7743 # RZ/G1M
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6ull-dhcor-maveo-box.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * DHCR-iMX6ULL-C080-R051-SPI-WBT-I-01LG
8 * DHCOR PCB number: 578-200 or newer
9 * maveo box PCB number: 525-200 or newer
12 /dts-v1/;
14 #include "imx6ull-dhcor-som.dtsi"
18 compatible = "marantec,imx6ull-dhcor-maveo-box", "dh,imx6ull-dhcor-som",
28 stdout-path = "serial0:115200n8";
31 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
32 compatible = "regulator-fixed";
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/linux-6.12.1/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include <linux/pinctrl/pinconf-generic.h>
20 #include "../pinctrl-utils.h"
21 #include "pinmux-aspeed.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
44 #define SCU80 0x80 /* Multi-function Pin Control #1 */
45 #define SCU84 0x84 /* Multi-function Pin Control #2 */
46 #define SCU88 0x88 /* Multi-function Pin Control #3 */
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/linux-6.12.1/drivers/pinctrl/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
63 including M1.
66 will be called pinctrl-apple-gpio.
69 bool "Axis ARTPEC-6 pin controller driver"
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
77 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
86 functionality. This driver supports the pinmux, push-pull and
117 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
124 AXP PMICs provides multiple GPIOs that can be muxed for different
141 The Awinic AW9523/AW9523B is a multi-function I2C GPIO
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/linux-6.12.1/drivers/tty/serial/
Dstm32-usart.c1 // SPDX-License-Identifier: GPL-2.0
9 * Inspired by st-asc.c from STMicroelectronics (c)
16 #include <linux/dma-direction.h>
18 #include <linux/dma-mapping.h>
37 #include "stm32-usart.h"
124 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits()
126 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits()
133 val = readl_relaxed(port->membase + reg); in stm32_usart_clr_bits()
135 writel_relaxed(val, port->membase + reg); in stm32_usart_clr_bits()
141 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; in stm32_usart_tx_empty()
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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mn-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
17 compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
24 stdout-path = &uart2;
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
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Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
27 stdout-path = &uart2;
36 compatible = "fixed-clock";
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/linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/include/
Dchipcommon.h1 // SPDX-License-Identifier: ISC
49 /* gpio - cleared only by power-on-reset */
76 u32 clockcontrol_pci; /* aka m1 */
234 #define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */
238 #define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */
251 #define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
/linux-6.12.1/drivers/net/ethernet/apm/xgene/
Dxgene_enet_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Applied Micro X-Gene SoC Ethernet Driver
28 for (i = 0; i < buf_pool->slots; i++) { in xgene_enet_init_bufpool()
29 raw_desc = &buf_pool->raw_desc16[i]; in xgene_enet_init_bufpool()
32 raw_desc->m0 = cpu_to_le64(i | in xgene_enet_init_bufpool()
33 SET_VAL(FPQNUM, buf_pool->dst_ring_num) | in xgene_enet_init_bufpool()
83 ndev = buf_pool->ndev; in xgene_enet_refill_pagepool()
86 slots = buf_pool->slots - 1; in xgene_enet_refill_pagepool()
87 tail = buf_pool->tail; in xgene_enet_refill_pagepool()
90 raw_desc = &buf_pool->raw_desc16[tail]; in xgene_enet_refill_pagepool()
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgk104.c99 struct ramfuc_reg r_mr[16]; /* MR0 - MR8, MR15 */
133 int N1, fN1, M1, P1; member
149 for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { in gk104_ram_train()
150 if (ram->pmask & (1 << i)) in gk104_ram_train()
160 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2); in r1373f4_init()
161 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in r1373f4_init()
162 const u32 runk0 = ram->fN1 << 16; in r1373f4_init()
163 const u32 runk1 = ram->fN1; in r1373f4_init()
165 if (ram->from == 2) { in r1373f4_init()
191 if (ram->mode == 2) { in r1373f4_init()
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/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
26 gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
27 output-high;
28 line-name = "LAN_RESET#";
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/linux-6.12.1/sound/soc/codecs/
Dmax98090.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
5 * Copyright 2011-2012 Maxim Integrated Products
279 /* Reset the codec by writing to this write-only reset register */ in max98090_reset()
280 ret = regmap_write(max98090->regmap, M98090_REG_SOFTWARE_RESET, in max98090_reset()
283 dev_err(max98090->component->dev, in max98090_reset()
300 -600, 600, 0);
303 0, 3, TLV_DB_SCALE_ITEM(-600, 300, 0),
308 static const DECLARE_TLV_DB_SCALE(max98090_av_tlv, -1200, 100, 0);
311 static const DECLARE_TLV_DB_SCALE(max98090_dv_tlv, -1500, 100, 0);
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