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/linux-6.12.1/drivers/gpu/drm/bridge/
Dmicrochip-lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
60 struct drm_bridge bridge; member
64 static inline struct mchp_lvds *bridge_to_lvds(struct drm_bridge *bridge) in bridge_to_lvds() argument
66 return container_of(bridge, struct mchp_lvds, bridge); in bridge_to_lvds()
69 static inline u32 lvds_readl(struct mchp_lvds *lvds, u32 offset) in lvds_readl() argument
71 return readl_relaxed(lvds->regs + offset); in lvds_readl()
74 static inline void lvds_writel(struct mchp_lvds *lvds, u32 offset, u32 val) in lvds_writel() argument
76 writel_relaxed(val, lvds->regs + offset); in lvds_writel()
79 static void lvds_serialiser_on(struct mchp_lvds *lvds) in lvds_serialiser_on() argument
84 lvds_writel(lvds, LVDSC_WPMR, (LVDSC_WPMR_WPKEY_PSSWD & in lvds_serialiser_on()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 Bridge registration and lookup framework.
13 DRM bridge wrapper of DRM panels
21 Simple transparent bridge that is used by several non-DRM drivers to
29 Simple bridge that terminates the bridge chain and provides HPD
36 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
43 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
61 tristate "ChromeOS EC ANX7688 bridge"
67 ChromeOS EC ANX7688 is an ultra-low power
68 4K Ultra-HD (4096x2160p60) mobile HD transmitter
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Dlvds-codec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/media-bus-format.h>
22 struct drm_bridge bridge; member
31 static inline struct lvds_codec *to_lvds_codec(struct drm_bridge *bridge) in to_lvds_codec() argument
33 return container_of(bridge, struct lvds_codec, bridge); in to_lvds_codec()
36 static int lvds_codec_attach(struct drm_bridge *bridge, in lvds_codec_attach() argument
39 struct lvds_codec *lvds_codec = to_lvds_codec(bridge); in lvds_codec_attach()
41 return drm_bridge_attach(bridge->encoder, lvds_codec->panel_bridge, in lvds_codec_attach()
42 bridge, flags); in lvds_codec_attach()
45 static void lvds_codec_enable(struct drm_bridge *bridge) in lvds_codec_enable() argument
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Dti-sn65dsi83.c1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
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Dmegachips-stdpxxxx-ge-b850v3-fw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
4 * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
10 * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
11 * display bridge of the GE B850v3. There are two physical bridges on the video
12 * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
19 * Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
61 struct drm_bridge bridge; member
71 struct i2c_adapter *adapter = client->adapter; in stdp2690_read_block()
76 .addr = client->addr, in stdp2690_read_block()
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Dfsl-ldb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/media-bus-format.h>
40 * Clear it to enable LVDS and set it to disable LVDS.
88 struct drm_bridge bridge; member
99 return (fsl_ldb->ch0_enabled && fsl_ldb->ch1_enabled); in fsl_ldb_is_dual()
102 static inline struct fsl_ldb *to_fsl_ldb(struct drm_bridge *bridge) in to_fsl_ldb() argument
104 return container_of(bridge, struct fsl_ldb, bridge); in to_fsl_ldb()
115 static int fsl_ldb_attach(struct drm_bridge *bridge, in fsl_ldb_attach() argument
118 struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge); in fsl_ldb_attach()
120 return drm_bridge_attach(bridge->encoder, fsl_ldb->panel_bridge, in fsl_ldb_attach()
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Dlontium-lt9211.c1 // SPDX-License-Identifier: GPL-2.0
3 * Lontium LT9211 bridge driver
6 * 2xDSI/2xLVDS/1xDPI -> 2xDSI/2xLVDS/1xDPI
8 * 1xDSI -> 1xLVDS
17 #include <linux/media-bus-format.h>
40 /* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
44 struct drm_bridge bridge; member
96 static struct lt9211 *bridge_to_lt9211(struct drm_bridge *bridge) in bridge_to_lt9211() argument
98 return container_of(bridge, struct lt9211, bridge); in bridge_to_lt9211()
101 static int lt9211_attach(struct drm_bridge *bridge, in lt9211_attach() argument
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Dtc358775.c1 // SPDX-License-Identifier: GPL-2.0
3 * TC358775 DSI to LVDS bridge driver
16 #include <linux/media-bus-format.h>
36 /* DSI D-PHY Layer Registers */
52 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
93 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
119 /* Mux Input Select for LVDS LINK Input */
162 #define LVCFG 0x049C /* LVDS Configuration */
163 #define LVPHY0 0x04A0 /* LVDS PHY 0 */
169 #define LVPHY1 0x04A4 /* LVDS PHY 1 */
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/linux-6.12.1/drivers/gpu/drm/renesas/rcar-du/
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
13 #include <linux/media-bus-format.h>
50 #define RCAR_LVDS_QUIRK_LANES BIT(0) /* LVDS lanes 1 and 3 inverted */
54 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
59 void (*pll_setup)(struct rcar_lvds *lvds, unsigned int freq);
67 struct drm_bridge bridge; member
84 container_of(b, struct rcar_lvds, bridge)
86 static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg) in rcar_lvds_read() argument
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Drcar_du_encoder.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Encoder
5 * Copyright (C) 2013-2014 Renesas Electronics Corporation
21 /* -----------------------------------------------------------------------------
54 struct drm_bridge *bridge; in rcar_du_encoder_init() local
58 * Locate the DRM bridge from the DT node. For the DPAD outputs, if the in rcar_du_encoder_init()
60 * create a panel bridge. in rcar_du_encoder_init()
70 bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel, in rcar_du_encoder_init()
72 if (IS_ERR(bridge)) in rcar_du_encoder_init()
73 return PTR_ERR(bridge); in rcar_du_encoder_init()
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/linux-6.12.1/drivers/gpu/drm/sun4i/
Dsun4i_lvds.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
44 struct sun4i_lvds *lvds = in sun4i_lvds_get_modes() local
47 return drm_panel_get_modes(lvds->panel, connector); in sun4i_lvds_get_modes()
70 struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); in sun4i_lvds_encoder_enable() local
72 DRM_DEBUG_DRIVER("Enabling LVDS output\n"); in sun4i_lvds_encoder_enable()
74 if (lvds->panel) { in sun4i_lvds_encoder_enable()
75 drm_panel_prepare(lvds->panel); in sun4i_lvds_encoder_enable()
76 drm_panel_enable(lvds->panel); in sun4i_lvds_encoder_enable()
82 struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); in sun4i_lvds_encoder_disable() local
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/linux-6.12.1/drivers/gpu/drm/stm/
Dlvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
4 * Author(s): Raphaël GALLAIS-POU <raphael.gallais-pou@foss.st.com> for STMicroelectronics.
16 #include <linux/clk-provider.h>
19 #include <linux/media-bus-format.h>
25 /* LVDS Host registers */
46 /* LVDS Wrapper registers */
55 #define CR_LVDSEN BIT(0) /* LVDS PHY Enable */
62 #define CR_LK1POL GENMASK(20, 16) /* Link-1 output Polarity */
63 #define CR_LK2POL GENMASK(25, 21) /* Link-2 output Polarity */
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 Enable support for the on-chip display controller on
16 will be called stm-drm.
26 tristate "STMicroelectronics LVDS Display Interface Transmitter DRM driver"
29 Enable support for LVDS encoders on STMicroelectronics SoC.
30 The STM LVDS is a bridge which serialize pixel stream onto
31 a LVDS protocol.
34 called lvds.
/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dlontium,lt9211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lontium,lt9211.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
10 - Marek Vasut <marex@denx.de>
13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
19 - lontium,lt9211
27 reset-gpios:
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Dfsl,ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP DPI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
15 those registers as bridge within the DT.
20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb
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Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358775 DSI to LVDS bridge
10 - Vinay Simha BN <simhavcs@gmail.com>
13 This binding supports DSI to LVDS bridges TC358765 and TC358775
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
18 limited by 135 MHz LVDS speed
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Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi83.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
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Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
16 used in LVDS mode, to remap the pixel color codings between those modules.
25 const: fsl,imx8qxp-pxl2dpi
27 fsl,sc-resource:
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Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
23 LDB split mode to support a dual link LVDS display. The channel indexes
41 - fsl,imx8qm-ldb
42 - fsl,imx8qxp-ldb
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Dtoshiba,tc358764.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358764.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358764 MIPI-DSI to LVDS bridge
10 - Andrzej Hajda <andrzej.hajda@intel.com>
20 reset-gpios:
23 vddc-supply:
26 vddio-supply:
29 vddlvds-supply:
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/linux-6.12.1/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
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/linux-6.12.1/drivers/gpu/drm/bridge/imx/
DKconfig7 tristate "Freescale i.MX8MP HDMI-TX bridge support"
18 tristate "Freescale i.MX8MP HDMI PVI bridge support"
25 tristate "Freescale i.MX8QM LVDS display bridge"
31 Choose this to enable the internal LVDS Display Bridge(LDB) found in
35 tristate "Freescale i.MX8QXP LVDS display bridge"
41 Choose this to enable the internal LVDS Display Bridge(LDB) found in
/linux-6.12.1/drivers/gpu/drm/
Ddrm_of.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/media-bus-format.h>
25 * drm_of_crtc_port_mask - find the mask of a registered CRTC by port OF node
39 if (tmp->port == port) in drm_of_crtc_port_mask()
50 * drm_of_find_possible_crtcs - find the possible CRTCs for an encoder port
83 * drm_of_component_match_add - Add a component helper OF node match rule
101 * drm_of_component_probe - Generic probe function for a component based master
121 if (!dev->of_node) in drm_of_component_probe()
122 return -EINVAL; in drm_of_component_probe()
129 port = of_parse_phandle(dev->of_node, "ports", i); in drm_of_component_probe()
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/linux-6.12.1/drivers/gpu/drm/rockchip/
Drockchip_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Mark Yao <mark.yao@rock-chips.com>
6 * Sandy Huang <hjc@rock-chips.com>
38 * struct rockchip_lvds_soc_data - rockchip lvds Soc private data
39 * @probe: LVDS platform probe function
40 * @helper_funcs: LVDS connector helper functions
43 int (*probe)(struct platform_device *pdev, struct rockchip_lvds *lvds);
54 int output; /* rgb lvds or dual lvds output */
58 struct drm_bridge *bridge; member
76 static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, in rk3288_writel() argument
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/linux-6.12.1/drivers/gpu/drm/tegra/
Drgb.c1 // SPDX-License-Identifier: GPL-2.0-only
96 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); in tegra_rgb_encoder_disable()
97 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_disable()
102 struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; in tegra_rgb_encoder_enable()
107 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable)); in tegra_rgb_encoder_enable()
110 tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS); in tegra_rgb_encoder_enable()
112 /* configure H- and V-sync signal polarities */ in tegra_rgb_encoder_enable()
113 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
115 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in tegra_rgb_encoder_enable()
120 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in tegra_rgb_encoder_enable()
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