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/linux-6.12.1/arch/arm64/include/asm/
Dlse.h9 #define __LSE_PREAMBLE ".arch_extension lse\n"
27 #define ARM64_LSE_ATOMIC_INSN(llsc, lse) \ argument
28 ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
34 #define ARM64_LSE_ATOMIC_INSN(llsc, lse) llsc argument
Dcmpxchg.h14 #include <asm/lse.h>
17 * We need separate acquire parameters for ll/sc and lse, since the full
34 /* LSE atomics */ \
Dpercpu.h79 /* LSE atomics */ \
100 /* LSE atomics */ \
Datomic.h17 #include <asm/lse.h>
/linux-6.12.1/tools/testing/selftests/net/forwarding/
Dtc_flower.sh554 # Match on first LSE (minimal values for each field)
556 flower $tcflags mpls lse depth 1 label 0 action continue
558 flower $tcflags mpls lse depth 1 tc 0 action continue
560 flower $tcflags mpls lse depth 1 bos 0 action continue
562 flower $tcflags mpls lse depth 1 ttl 0 action continue
564 # Match on second LSE (maximal values for each field)
566 flower $tcflags mpls lse depth 2 label 1048575 action continue
568 flower $tcflags mpls lse depth 2 tc 7 action continue
570 flower $tcflags mpls lse depth 2 bos 1 action continue
572 flower $tcflags mpls lse depth 2 ttl 255 action continue
[all …]
/linux-6.12.1/include/linux/soc/marvell/octeontx2/
Dasm.h20 __asm__ volatile(".cpu generic+lse\n" \
33 __asm__ volatile(".cpu generic+lse\n" \
43 asm volatile (".cpu generic+lse\n" in otx2_atomic64_fetch_add()
/linux-6.12.1/arch/arm64/kvm/hyp/include/nvhe/
Dspinlock.h17 #include <asm/lse.h>
58 /* LSE atomics */ in hyp_spin_lock()
92 /* LSE atomics */ in hyp_spin_unlock()
/linux-6.12.1/drivers/infiniband/hw/hfi1/
Dplatform.c224 u16 lss = ppd->link_speed_supported, lse = ppd->link_speed_enabled; in qual_bitrate() local
227 if ((lss & OPA_LINK_SPEED_25G) && (lse & OPA_LINK_SPEED_25G) && in qual_bitrate()
232 if ((lss & OPA_LINK_SPEED_12_5G) && (lse & OPA_LINK_SPEED_12_5G) && in qual_bitrate()
729 u16 lss = ppd->link_speed_supported, lse = ppd->link_speed_enabled; in tune_active_qsfp() local
794 if ((lss & OPA_LINK_SPEED_25G) && (lse & OPA_LINK_SPEED_25G)) in tune_active_qsfp()
798 else if ((lss & OPA_LINK_SPEED_12_5G) && (lse & OPA_LINK_SPEED_12_5G)) in tune_active_qsfp()
819 u16 lss = ppd->link_speed_supported, lse = ppd->link_speed_enabled; in tune_qsfp() local
833 if ((lss & OPA_LINK_SPEED_25G) && (lse & OPA_LINK_SPEED_25G)) in tune_qsfp()
836 (lse & OPA_LINK_SPEED_12_5G)) in tune_qsfp()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dst,stm32mp1-rcc.yaml99 - const: lse
124 clock-names = "hse", "hsi", "csi", "lse", "lsi";
Dst,stm32h7-rcc.txt22 - low speed external clock signal (LSE)
/linux-6.12.1/net/sched/
Dact_mpls.c23 static __be32 tcf_mpls_get_lse(struct mpls_shim_hdr *lse, in tcf_mpls_get_lse() argument
28 if (lse) in tcf_mpls_get_lse()
29 new_lse = be32_to_cpu(lse->label_stack_entry); in tcf_mpls_get_lse()
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp157a-dk1-scmi.dts72 clock-names = "hse", "hsi", "csi", "lse", "lsi";
Dstm32mp157c-ed1-scmi.dts77 clock-names = "hse", "hsi", "csi", "lse", "lsi";
Dstm32mp157c-dk2-scmi.dts78 clock-names = "hse", "hsi", "csi", "lse", "lsi";
Dstm32mp157c-ev1-scmi.dts82 clock-names = "hse", "hsi", "csi", "lse", "lsi";
/linux-6.12.1/drivers/clk/
Dclk-stm32f4.c1117 "no-clock", "lse", "lsi", "hse-rtc"
1137 static const char *hdmi_parents[2] = { "lse", "hsi_div488" };
1141 static const char *lptim_parent[4] = { "apb1_mul", "lsi", "hsi", "lse" };
1143 static const char *uart_parents1[4] = { "apb2_div", "sys", "hsi", "lse" };
1144 static const char *uart_parents2[4] = { "apb1_div", "sys", "hsi", "lse" };
1840 clks[CLK_LSE] = clk_register_rgate(NULL, "lse", "clk-lse", 0, in stm32f4_rcc_init()
1844 pr_err("Unable to register lse clock\n"); in stm32f4_rcc_init()
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/en/
Dtc_tun_mplsoudp.c78 /* Only support matching the first LSE */ in parse_tunnel()
/linux-6.12.1/net/openvswitch/
Dflow.c796 __be32 lse; in key_extract_l3l4() local
803 memcpy(&lse, skb_inner_network_header(skb), MPLS_HLEN); in key_extract_l3l4()
806 memcpy(&key->mpls.lse[label_count - 1], &lse, in key_extract_l3l4()
811 if (lse & htonl(MPLS_LS_S_MASK)) in key_extract_l3l4()
Dactions.c207 __be32 lse; in set_mpls() local
214 lse = OVS_MASKED(stack->label_stack_entry, *mpls_lse, *mask); in set_mpls()
215 err = skb_mpls_update_lse(skb, lse); in set_mpls()
219 flow_key->mpls.lse[0] = lse; in set_mpls()
/linux-6.12.1/Documentation/netlink/specs/
Dovs_flow.yaml55 name: mpls-lse
307 name: mpls-lse
325 name: mpls-lse
/linux-6.12.1/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.yaml63 - LSCO (Low Speed Clock Output) that allow to output LSE clock on a pin.
/linux-6.12.1/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_npc_fs.c46 [NPC_MPLS1_LBTCBOS] = "lse depth 1 label tc bos",
47 [NPC_MPLS1_TTL] = "lse depth 1 ttl",
48 [NPC_MPLS2_LBTCBOS] = "lse depth 2 label tc bos",
49 [NPC_MPLS2_TTL] = "lse depth 2 ttl",
50 [NPC_MPLS3_LBTCBOS] = "lse depth 3 label tc bos",
51 [NPC_MPLS3_TTL] = "lse depth 3 ttl",
52 [NPC_MPLS4_LBTCBOS] = "lse depth 4 label tc bos",
53 [NPC_MPLS4_TTL] = "lse depth 4",
/linux-6.12.1/net/core/
Dflow_dissector.c542 struct flow_dissector_mpls_lse *lse; in __skb_flow_dissect_mpls() local
547 lse = &key_mpls->ls[lse_index]; in __skb_flow_dissect_mpls()
549 lse->mpls_ttl = (entry & MPLS_LS_TTL_MASK) >> MPLS_LS_TTL_SHIFT; in __skb_flow_dissect_mpls()
550 lse->mpls_bos = bos; in __skb_flow_dissect_mpls()
551 lse->mpls_tc = (entry & MPLS_LS_TC_MASK) >> MPLS_LS_TC_SHIFT; in __skb_flow_dissect_mpls()
552 lse->mpls_label = label; in __skb_flow_dissect_mpls()
/linux-6.12.1/drivers/infiniband/hw/qib/
Dqib_mad.c665 u8 lse; in subn_set_portinfo() local
742 lse = pip->linkspeedactive_enabled & 0xF; in subn_set_portinfo()
743 if (lse) { in subn_set_portinfo()
749 if (lse == 15) in subn_set_portinfo()
752 else if (lse >= 8 || (lse & ~ppd->link_speed_supported)) in subn_set_portinfo()
754 else if (lse != ppd->link_speed_enabled) in subn_set_portinfo()
755 set_link_speed_enabled(ppd, lse); in subn_set_portinfo()
/linux-6.12.1/Documentation/admin-guide/acpi/
Dssdt-overlays.rst22 Minnowboard MAX development board exposed via the LSE connector [1], the

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