Searched full:lpddr3 (Results 1 – 16 of 16) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr3.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
21 - const: jedec,lpddr3
23 - pattern: "^lpddr3-[0-9a-f]{2},[0-9a-f]{4}$"
24 - const: jedec,lpddr3
177 $ref: jedec,lpddr3-timings.yaml
179 The lpddr3 node may have one or more child nodes with timings.
193 lpddr3 {
194 compatible = "samsung,K3QF2F20DB", "jedec,lpddr3";
221 compatible = "jedec,lpddr3-timings";
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| D | jedec,lpddr-channel.yaml | 22 - jedec,lpddr3-channel
76 const: jedec,lpddr3-channel
80 $ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
113 compatible = "jedec,lpddr3-channel";
117 compatible = "lpddr3-ff,0100", "jedec,lpddr3";
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| D | jedec,lpddr3-timings.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
14 const: jedec,lpddr3-timings
133 lpddr3 {
135 compatible = "jedec,lpddr3-timings";
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| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
| D | rockchip,rk3399-dmc.yaml | 178 When the DRAM type is LPDDR3, this parameter defines then ODT disable
186 When the DRAM type is LPDDR3, this parameter defines the DRAM side drive
194 When the DRAM type is LPDDR3, this parameter defines the DRAM side ODT
202 When the DRAM type is LPDDR3, this parameter defines the PHY side CA line
210 When the DRAM type is LPDDR3, this parameter defines the PHY side DQ line
218 When dram type is LPDDR3, this parameter define the phy side odt
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| D | samsung,exynos5422-dmc.yaml | 56 refer to jedec,lpddr3.yaml.
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| D | nvidia,tegra124-mc.yaml | 18 for DDR3L and LPDDR3 SDRAMs.
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| D | nvidia,tegra30-emc.yaml | 19 LPDDR3, and DDR3.
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| /linux-6.12.1/drivers/memory/ |
| D | of_memory.c | 157 * of_lpddr3_get_min_tck() - extract min timing values for lpddr3
244 * of_lpddr3_get_ddr_timings() - extracts the lpddr3 timings and updates no of
267 tim_compat = "jedec,lpddr3-timings"; in of_lpddr3_get_ddr_timings()
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| D | jedec_ddr.h | 221 * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
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| /linux-6.12.1/arch/arm/boot/dts/samsung/ |
| D | exynos5422-odroid-core.dtsi | 336 samsung_K3QF2F20DB: lpddr3 {
337 compatible = "samsung,K3QF2F20DB", "jedec,lpddr3";
364 compatible = "jedec,lpddr3-timings";
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| /linux-6.12.1/drivers/i2c/ |
| D | i2c-smbus.c | 421 case 0x1D: /* LPDDR3 */ in i2c_register_spd()
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| /linux-6.12.1/sound/soc/intel/avs/ |
| D | board_selection.c | 29 DMI_MATCH(DMI_BOARD_NAME, "Skylake Y LPDDR3 RVP3"),
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| /linux-6.12.1/drivers/gpu/drm/i915/soc/ |
| D | intel_dram.c | 34 DRAM_TYPE_STR(LPDDR3), in intel_dram_type_str()
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| /linux-6.12.1/drivers/memory/tegra/ |
| D | tegra210-emc-cc-r21021.c | 1246 * Send MRWs to LPDDR3/DDR3. in tegra210_emc_r21021_set_clock()
1267 * ZQCAL for LPDDR3/DDR3 in tegra210_emc_r21021_set_clock()
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| D | tegra124-emc.c | 848 /* LPDDR3: Turn off BGBIAS if low frequency */ in tegra_emc_complete_timing_change()
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| /linux-6.12.1/drivers/gpu/drm/amd/include/ |
| D | atomfirmware.h | 1759 LpDdr3MemType, ///< Assign 29 to LPDDR3
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