/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ddr/ |
D | jedec,lpddr2.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml# 7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2 23 - jedec,lpddr2-nvm 24 - jedec,lpddr2-s2 25 - jedec,lpddr2-s4 27 - pattern: "^lpddr2-[0-9a-f]{2},[0-9a-f]{4}$" 29 - jedec,lpddr2-nvm 30 - jedec,lpddr2-s2 31 - jedec,lpddr2-s4 128 "^lpddr2-timings": [all …]
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D | jedec,lpddr2-timings.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml# 7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin 14 const: jedec,lpddr2-timings 117 compatible = "jedec,lpddr2-timings";
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D | jedec,lpddr-channel.yaml | 21 - jedec,lpddr2-channel 67 const: jedec,lpddr2-channel 71 $ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
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/linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
D | elpida_ecb240abacn.dtsi | 7 elpida_ECB240ABACN: lpddr2 { 8 compatible = "elpida,ECB240ABACN","jedec,lpddr2-s4"; 24 timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 { 25 compatible = "jedec,lpddr2-timings"; 46 timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 { 47 compatible = "jedec,lpddr2-timings";
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/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
D | nvidia,tegra20-emc.yaml | 19 standard protocols: DDR1, LPDDR2 and DDR2. 167 lpddr2: 168 $ref: ddr/jedec,lpddr2.yaml# 180 - lpddr2 242 lpddr2 { 243 compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
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D | nvidia,tegra30-mc.yaml | 34 and arbitrates among them to allocate memory bandwidth for DDR3L and LPDDR2
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D | nvidia,tegra30-emc.yaml | 18 settings. Tegra30 EMC supports multiple JEDEC standard protocols: LPDDR2,
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/linux-6.12.1/drivers/mtd/lpddr/ |
D | lpddr2_nvm.c | 3 * LPDDR2-NVM MTD driver. This module provides read, write, erase, lock/unlock 4 * support for LPDDR2-NVM PCM memories 54 /* LPDDR2-NVM Commands */ 63 /* LPDDR2-NVM Registers offset */ 131 * Enable lpddr2-nvm Overlay Window 132 * Overlay Window is a memory mapped area containing all LPDDR2-NVM registers 146 * Disable lpddr2-nvm Overlay Window 147 * Overlay Window is a memory mapped area containing all LPDDR2-NVM registers 161 * Execute lpddr2-nvm operations 231 * Execute lpddr2-nvm operations @ block level [all …]
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D | Kconfig | 2 menu "LPDDR & LPDDR2 PCM memory drivers" 25 tristate "Support for LPDDR2-NVM flash chips" 27 This option enables support of PCM memories with a LPDDR2-NVM
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/linux-6.12.1/Documentation/driver-api/memory-devices/ |
D | ti-emif.rst | 30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 31 This driver takes care of only LPDDR2 memories presently. The 63 - mr4 : last polled value of MR4 register in the LPDDR2 device. MR4
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/linux-6.12.1/drivers/memory/ |
D | jedec_ddr.h | 96 * LPDDR2 related defines 143 * Structure for timings from the LPDDR2 datasheet 205 * Structure for information about LPDDR2 chip. All parameters are 221 * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
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D | of_memory.c | 96 * @device_type: Type of ddr(LPDDR2 S2/S4) 117 tim_compat = "jedec,lpddr2-timings"; in of_get_ddr_timings() 307 * of_lpddr2_get_info() - extracts information about the lpddr2 chip. 308 * @np: Pointer to device tree node containing lpddr2 info 351 if (of_device_is_compatible(np, "jedec,lpddr2-s4")) in of_lpddr2_get_info() 353 else if (of_device_is_compatible(np, "jedec,lpddr2-s2")) in of_lpddr2_get_info() 355 else if (of_device_is_compatible(np, "jedec,lpddr2-nvm")) in of_lpddr2_get_info()
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D | jedec_ddr_data.c | 14 /* LPDDR2 addressing details from JESD209-2 section 2.4 */ 30 /* LPDDR2 AC timing parameters from JESD209-2 section 12 */
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D | Kconfig | 97 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 98 This driver takes care of only LPDDR2 memories presently. The
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D | emif.c | 37 * @temperature_level: Maximum temperature of LPDDR2 devices attached 184 * Workaround for errata i743 - LPDDR2 Power-Down State is Not in set_lpmode() 503 /* No de-rating for non-lpddr2 devices */ in setup_temperature_sensitive_regs() 885 if (of_device_is_compatible(np_ddr, "jedec,lpddr2-s4")) in of_get_ddr_info() 887 else if (of_device_is_compatible(np_ddr, "jedec,lpddr2-s2")) in of_get_ddr_info()
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/linux-6.12.1/include/linux/platform_data/ |
D | emif_plat.h | 46 * @type: Device type (LPDDR2-S4, LPDDR2-S2 etc) 80 * @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal
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/linux-6.12.1/drivers/soc/atmel/ |
D | soc.c | 163 "sama5d27c 128MiB LPDDR2 SiP", "sama5d2"), 166 "sama5d27c 256MiB LPDDR2 SiP", "sama5d2"), 178 "sama5d28c 128MiB LPDDR2 SiP", "sama5d2"), 181 "sama5d28c 256MiB LPDDR2 SiP", "sama5d2"),
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/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ti/ |
D | emif.txt | 5 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance 24 - device-handle : phandle to a "lpddr2" node representing the memory part
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/linux-6.12.1/arch/arm/boot/dts/nvidia/ |
D | tegra30-asus-tf201.dts | 113 /* Elpida 1GB EDB8132B2MA-8D-F LPDDR2 400MHz */ 168 /* TF201 Unknown 1GB LPDDR2 500MHZ */ 225 /* Elpida 1GB EDB8132B2MA-8D-F LPDDR2 400MHz */ 405 /* TF201 Unknown 1GB LPDDR2 500MHZ */
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D | tegra30-lg-p895.dts | 117 /* Hynix 1GB H9TCNNN8JDMMPR LPDDR2 533MHz */ 194 /* Hynix 1GB H9TCNNN8JDMMPR LPDDR2 533MHz */
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/linux-6.12.1/drivers/cpufreq/ |
D | s5pv210-cpufreq.c | 115 LPDDR2 = 0x2, enumerator 525 * check_mem_type : This driver only support LPDDR & LPDDR2. in s5pv210_cpu_init() 530 if ((mem_type != LPDDR) && (mem_type != LPDDR2)) { in s5pv210_cpu_init()
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/linux-6.12.1/drivers/memory/tegra/ |
D | tegra20-emc.c | 431 if (of_node_name_eq(child, "lpddr2")) in tegra_emc_load_timings_from_dt() 484 lpddr2_np = of_find_node_by_name(np, "lpddr2"); in tegra_emc_find_node_by_ram_code() 553 /* wait for the LPDDR2 data-valid interrupt */ in emc_read_lpddr_mode_register() 648 dram_type_str = "LPDDR2"; in emc_setup_hw()
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/linux-6.12.1/arch/arm/mach-tegra/ |
D | sleep-tegra30.S | 548 /* Issue a ZQ_CAL for dev0 - LPDDR2 */ 558 /* Issue a ZQ_CAL for dev0 - LPDDR2 */
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/linux-6.12.1/arch/arm/mach-imx/ |
D | suspend-imx6.S | 212 /* LPDDR2's last 3 IOs need special setting */
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/linux-6.12.1/drivers/i2c/ |
D | i2c-smbus.c | 420 case 0x1C: /* LPDDR2 */ in i2c_register_spd()
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