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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,sc8280xp-lpasscc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sc8280xp-lpasscc.yaml#
17 include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h
24 - qcom,sc8280xp-lpasscc
29 - const: qcom,x1e80100-lpasscc
30 - const: qcom,sc8280xp-lpasscc
51 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
60 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
61 lpasscc: clock-controller@33e0000 {
62 compatible = "qcom,sc8280xp-lpasscc";
Dqcom,sdm845-lpasscc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-lpasscc.yaml#
19 const: qcom,sdm845-lpasscc
43 compatible = "qcom,sdm845-lpasscc";
Dqcom,sc7280-lpasscc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
21 - qcom,sc7280-lpasscc
64 compatible = "qcom,sc7280-lpasscc";
/linux-6.12.1/drivers/clk/qcom/
Dlpasscc-sc8280xp.c15 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
63 .compatible = "qcom,sc8280xp-lpasscc",
80 .name = "lpasscc-sc8280xp",
88 MODULE_DESCRIPTION("QTI LPASSCC SC8280XP Driver");
Dlpasscc-sdm845.c135 { .compatible = "qcom,sdm845-lpasscc" },
143 .name = "sdm845-lpasscc",
Dlpasscc-sc7280.c159 { .compatible = "qcom,sc7280-lpasscc" },
167 .name = "sc7280-lpasscc",
DMakefile92 obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o
93 obj-$(CONFIG_SC_LPASSCC_8280XP) += lpasscc-sc8280xp.o
105 obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o
/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dqcom,sdm845-adsp-pil.yaml141 <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
142 <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
143 <&lpasscc LPASS_QDSP6SS_XO_CLK>,
144 <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
145 <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsc7280-chrome-common.dtsi71 &lpasscc {
Dsc7180.dtsi3970 lpasscc: clock-controller@62d00000 { label
4001 <&lpasscc LPASS_AUDIO_CORE_CORE_CLK>,
4002 <&lpasscc LPASS_AUDIO_CORE_EXT_MCLK0_CLK>,
4003 <&lpasscc LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK>,
4004 <&lpasscc LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK>,
4005 <&lpasscc LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK>;
Dx1e80100.dtsi7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
3700 resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
3858 lpasscc: clock-controller@6ea0000 { label
3859 compatible = "qcom,x1e80100-lpasscc", "qcom,sc8280xp-lpasscc";
Dsdm845-cheza.dtsi757 &lpasscc {
Dsc7180-trogdor.dtsi750 &lpasscc {
Dsc8280xp.dtsi12 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
2949 resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
3144 lpasscc: clock-controller@33e0000 { label
3145 compatible = "qcom,sc8280xp-lpasscc";
Dsc7280.dtsi2480 lpasscc: lpasscc@3000000 { label
2481 compatible = "qcom,sc7280-lpasscc";
Dsdm845.dtsi5236 lpasscc: clock-controller@17014000 { label
5237 compatible = "qcom,sdm845-lpasscc";