Searched +full:little +full:- +full:endian (Results 1 – 25 of 943) sorted by relevance
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| /linux-6.12.1/include/uapi/drm/ |
| D | drm_fourcc.h | 39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
76 * - Kernel and user-space drivers: for drivers it's important that modifiers
80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
93 * -----------------------
98 * upstream in-kernel or open source userspace user does not apply.
108 #define DRM_FORMAT_BIG_ENDIAN (1U<<31) /* format is big endian instead of little endian */
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| /linux-6.12.1/Documentation/devicetree/bindings/ |
| D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
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| /linux-6.12.1/Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
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| /linux-6.12.1/drivers/crypto/cavium/cpt/ |
| D | cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
30 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
42 * Address must be 16-byte aligned.
44 * sign-extended bit <48> for forward compatibility.
46 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
48 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
56 * work-queue entry that CPT submits work to SSO after all context,
60 * use a sign-extended bit <48> for forward compatibility.
76 #if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
80 #else /* Word 0 - Little Endian */
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| /linux-6.12.1/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
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| /linux-6.12.1/drivers/media/dvb-frontends/ |
| D | atbm8830_priv.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
39 #define REG_CARRIER_OFFSET 0x0827 /* 0x0827-0x0829 little endian */
42 #define REG_IF_FREQ 0x0A00 /* 0x0A00-0x0A02 little endian */
43 #define REG_OSC_CLK 0x0A03 /* 0x0A03-0x0A05 little endian */
54 #define REG_AGC_TARGET 0x1003 /* 0x1003-0x1005 little endian */
58 #define REG_AGC_PWM_VAL 0x1028 /* 0x1028-0x1029 little endian */
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| /linux-6.12.1/include/uapi/linux/ |
| D | virtio_pcidev.h | 1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
11 * enum virtio_pcidev_ops - virtual PCI device operations
14 * the @data field should be filled in by the device (in little endian).
16 * the @data field contains the data to write (in little endian).
18 * the @data field should be filled in by the device (in little endian).
20 * the @data field contains the data to write (in little endian).
23 * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for
25 * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports
26 * the 16- or 32-bit write that would otherwise be done into memory,
44 * struct virtio_pcidev_msg - virtio PCI device operation
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| /linux-6.12.1/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
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| D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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| D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
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| /linux-6.12.1/drivers/crypto/marvell/octeontx/ |
| D | otx_cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0
154 * CPT OcteonTX VF MSI-X Vector Enumeration
155 * Enumerates the MSI-X interrupt vectors.
167 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
179 * Address must be 16-byte aligned.
181 * sign-extended bit <48> for forward compatibility.
183 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
185 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
193 * work-queue entry that CPT submits work to SSO after all context,
197 * use a sign-extended bit <48> for forward compatibility.
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| /linux-6.12.1/Documentation/translations/zh_CN/arch/riscv/ |
| D | boot-image-header.rst | 1 .. include:: ../../disclaimer-zh_CN.rst
3 :Original: Documentation/arch/riscv/boot-image-header.rst
9 .. _cn_boot-image-header.rst:
12 RISC-V Linux启动镜像文件头
18 此文档仅描述RISC-V Linux 启动文件头的详情。
27 u64 text_offset; /* Image load offset, little endian */
28 u64 image_size; /* Effective Image size, little endian */
29 u64 flags; /* kernel flags, little endian */
33 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
34 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
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| /linux-6.12.1/include/crypto/ |
| D | gf128mul.h | 1 /* gf128mul.h - GF(2^128) multiplication functions
16 ---------------------------------------------------------------------------
43 ---------------------------------------------------------------------------
59 * http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/gcm/gcm-revised-spec.pdf
61 * The elements of GF(2^128) := GF(2)[X]/(X^128-X^7-X^2-X^1-1) can
73 * in every byte in little-endian order and the bytes themselves also in
74 * little endian order. I will call this lle (little-little-endian).
81 * bytes also. This is bbe (big-big-endian). Now the buffer above
86 * Both of the above formats are easy to implement on big-endian
90 * format (bits are stored in big endian order and the bytes in little
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| /linux-6.12.1/Documentation/arch/riscv/ |
| D | boot-image-header.rst | 2 Boot image header in RISC-V Linux
8 This document only describes the boot image header details for RISC-V Linux.
10 The following 64-byte header is present in decompressed Linux kernel image::
14 u64 text_offset; /* Image load offset, little endian */
15 u64 image_size; /* Effective Image size, little endian */
16 u64 flags; /* kernel flags, little endian */
20 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
21 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
25 ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common
31 - This header is also reused to support EFI stub for RISC-V. EFI specification
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| /linux-6.12.1/arch/sparc/include/uapi/asm/ |
| D | asi.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
37 /* SPARCstation-5: only 6 bits are decoded. */
69 /* Block-copy operations are available only on certain V8 cpus. */
79 /* Block-fill operations are available on certain V8 cpus */
83 * the available ASI's for physical ram pass-through, but I don't have
89 #define ASI_M_VMEUS 0x2A /* VME user 16-bit access */
90 #define ASI_M_VMEPS 0x2B /* VME priv 16-bit access */
91 #define ASI_M_VMEUT 0x2C /* VME user 32-bit access */
92 #define ASI_M_VMEPT 0x2D /* VME priv 32-bit access */
128 #define ASI_NL 0x0c /* Nucleus, little endian */
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| /linux-6.12.1/Documentation/devicetree/bindings/display/ |
| D | sm501fb.txt | 7 - compatible : should be "smi,sm501".
8 - reg : contain two entries:
9 - First entry: System Configuration register
10 - Second entry: IO space (Display Controller register)
11 - interrupts : SMI interrupt to the cpu should be described here.
14 - mode : select a video mode:
15 <xres>x<yres>[-<bpp>][@<refresh>]
16 - edid : verbatim EDID data block describing attached display.
19 - little-endian: available on big endian systems, to
20 set different foreign endian.
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| /linux-6.12.1/Documentation/filesystems/ |
| D | sysv-fs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 - Xenix FS,
9 - SystemV/386 FS,
10 - Coherent FS.
18 mount [-r] -t sysv device mountpoint
22 -t sysv
23 -t xenix
24 -t coherent
30 - Coherent FS:
32 - The "free list interleave" n:m is currently ignored.
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| /linux-6.12.1/Documentation/devicetree/bindings/gpio/ |
| D | fsl,qoriq-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,mpc5121-gpio
17 - fsl,mpc5125-gpio
18 - fsl,mpc8349-gpio
19 - fsl,mpc8572-gpio
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| /linux-6.12.1/arch/powerpc/crypto/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
14 - Little-endian
25 - AltiVec extensions
37 - AltiVec extensions
59 tristate "Hash functions: SHA-1"
62 SHA-1 secure hash algorithm (FIPS 180)
67 tristate "Hash functions: SHA-1 (SPE)"
70 SHA-1 secure hash algorithm (FIPS 180)
73 - SPE (Signal Processing Engine) extensions
76 tristate "Hash functions: SHA-224 and SHA-256 (SPE)"
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| /linux-6.12.1/arch/riscv/include/asm/ |
| D | image.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
34 * struct riscv_image_header - riscv kernel image header
37 * @text_offset: Image load offset (little endian)
38 * @image_size: Effective Image size (little endian)
39 * @flags: kernel flags (little endian)
43 * @magic: Magic number (RISC-V specific; deprecated)
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| /linux-6.12.1/arch/arm/include/asm/ |
| D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Big endian support: Copyright 2001, Nicolas Pitre
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
134 * little byte 3 byte 2 byte 1 byte 0
137 * This means that reading a 32-bit word at address 0 returns the same
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| /linux-6.12.1/drivers/staging/rtl8723bs/include/ |
| D | basic_types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
12 #define FAIL (-1)
16 #define FIELD_OFFSET(s, field) ((__kernel_ssize_t)&((s *)(0))->field)
22 /* TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness */
25 *Call endian free function when
38 /* Convert little data endian to host ordering */
79 (0xFFFFFFFF >> (32 - (__bitlen)))
81 (0xFFFF >> (16 - (__bitlen)))
83 (0xFF >> (8 - (__bitlen)))
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| /linux-6.12.1/tools/testing/selftests/rseq/ |
| D | rseq-arm.h | 1 /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
3 * rseq-arm.h
5 * (C) Copyright 2016-2022 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
9 * - ARM little endian
12 * value 0x5de3. This traps if user-space reaches this instruction by mistake,
14 * pointer to attacker-controlled code on rseq abort.
23 * little endian:
27 * - ARMv6+ big endian (BE8):
29 * ARMv6+ -mbig-endian generates mixed endianness code vs data: little-endian
30 * code and big-endian data. The data value of the signature needs to have its
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| /linux-6.12.1/drivers/firewire/ |
| D | nosy-user.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
21 * quadlet with timestamp (microseconds, CPU endian)
22 * quadlet-padded packet data... (little endian)
23 * quadlet with ack (little endian)
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| /linux-6.12.1/drivers/video/fbdev/core/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
72 Allow generic frame-buffer functions to work on displays with 1, 2
104 Allow generic frame-buffer to provide get_fb_unmapped_area
112 non-native endianness (e.g. Little-Endian framebuffer on a
113 Big-Endian machine). Most probably you don't have such hardware,
121 bool "Support for Big- and Little-Endian framebuffers"
124 bool "Support for Big-Endian framebuffers only"
127 bool "Support for Little-Endian framebuffers only"
212 terms of number of tiles in the x- and y-axis.
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