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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dbrcm,iproc-clocks.yaml48 - brcm,sr-lcpll1
261 - brcm,sr-lcpll1
321 lcpll1 crystal 0 BCM_SR_LCPLL1
322 clk_wan lcpll1 1 BCM_SR_LCPLL1_WAN_CLK
323 clk_usb_ref lcpll1 2 BCM_SR_LCPLL1_USB_REF_CLK
324 clk_crmu_ts lcpll1 3 BCM_SR_LCPLL1_CRMU_TS_CLK
327 clk_pcie_phy_ref lcpll1 1 BCM_SR_LCPLL_PCIE_PHY_REF_CLK
/linux-6.12.1/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-clock.dtsi116 lcpll1: lcpll1@1d138 { label
118 compatible = "brcm,sr-lcpll1";
122 clock-output-names = "lcpll1", "clk_wan",
/linux-6.12.1/include/dt-bindings/clock/
Dbcm-sr.h89 /* LCPLL1 clock channel ID */
/linux-6.12.1/drivers/clk/bcm/
Dclk-sr.c398 { .compatible = "brcm,sr-lcpll1", .data = sr_lcpll1_clk_init },
/linux-6.12.1/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main_regs.h2306 /* CLKGEN:LCPLL1:LCPLL1_CORE_CLK_CFG */