/linux-6.12.1/Documentation/devicetree/bindings/display/ |
D | fsl,lcdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/fsl,lcdif.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale/NXP i.MX LCD Interface (LCDIF) 10 - Marek Vasut <marex@denx.de> 11 - Stefan Agner <stefan@agner.ch> 14 (e)LCDIF display controller found in the Freescale/NXP i.MX SoCs. 19 - enum: 20 - fsl,imx23-lcdif [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mm-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM DISP blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mm-disp-blk-ctrl 21 - const: syscon 26 '#power-domain-cells': [all …]
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D | fsl,imx8mn-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MN DISP blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mn-disp-blk-ctrl 21 - const: syscon 26 '#power-domain-cells': [all …]
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D | fsl,imx8mp-media-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Paul Elder <paul.elder@ideasonboard.com> 13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral 20 - const: fsl,imx8mp-media-blk-ctrl 21 - const: syscon 26 '#address-cells': 29 '#size-cells': [all …]
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D | fsl,imx8mp-hdmi-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MP HDMI blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mp-hdmi-blk-ctrl 21 - const: syscon 26 '#power-domain-cells': [all …]
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D | fsl,imx93-media-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX93 Media blk-ctrl 10 - Peng Fan <peng.fan@nxp.com> 15 clocking, reset, and miscellaneous top-level controls for peripherals 21 - const: fsl,imx93-media-blk-ctrl 22 - const: syscon 27 '#power-domain-cells': [all …]
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/linux-6.12.1/drivers/gpu/drm/mxsfb/ |
D | lcdif_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 #include <linux/dma-mapping.h> 47 static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif) in lcdif_attach_bridge() argument 49 struct device *dev = lcdif->drm->dev; in lcdif_attach_bridge() 54 for_each_endpoint_of_node(dev->of_node, ep) { in lcdif_attach_bridge() 73 bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, of_ep.id); in lcdif_attach_bridge() 86 return -ENOMEM; in lcdif_attach_bridge() 89 encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc); in lcdif_attach_bridge() 90 ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs, in lcdif_attach_bridge() 114 struct lcdif_drm_private *lcdif = drm->dev_private; in lcdif_irq_handler() local [all …]
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D | lcdif_kms.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 12 #include <linux/media-bus-format.h> 46 /* ----------------------------------------------------------------------------- 68 * |R| |1.1644 0.0000 1.5960| |Y - 16 | 69 * |G| = |1.1644 -0.3917 -0.8129| * |Cb - 128| 70 * |B| |1.1644 2.0172 0.0000| |Cr - 128| 83 * |R| |1.0000 0.0000 1.4020| |Y - 0 | 84 * |G| = |1.0000 -0.3441 -0.7141| * |Cb - 128| 85 * |B| |1.0000 1.7720 0.0000| |Cr - 128| 100 * |R| |1.1644 0.0000 1.7927| |Y - 16 | [all …]
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D | mxsfb_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 7 * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. 12 #include <linux/dma-mapping.h> 82 clk_prepare_enable(mxsfb->clk_axi); in mxsfb_enable_axi_clk() 87 clk_disable_unprepare(mxsfb->clk_axi); in mxsfb_disable_axi_clk() 98 return ERR_PTR(-EINVAL); in mxsfb_fb_create() 100 if (mode_cmd->width * info->cpp[0] != mode_cmd->pitches[0]) { in mxsfb_fb_create() 101 dev_dbg(dev->dev, "Invalid pitch: fb width must match pitch\n"); in mxsfb_fb_create() 102 return ERR_PTR(-EINVAL); in mxsfb_fb_create() 120 struct drm_device *drm = mxsfb->drm; in mxsfb_attach_bridge() [all …]
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/linux-6.12.1/drivers/pmdomain/imx/ |
D | imx8m-blk-ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0+ 19 #include <dt-bindings/power/imx8mm-power.h> 20 #include <dt-bindings/power/imx8mn-power.h> 21 #include <dt-bindings/power/imx8mp-power.h> 22 #include <dt-bindings/power/imx8mq-power.h> 53 * an if-statement should be used before setting and clearing this 88 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on() 89 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on() 93 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on() 95 pm_runtime_put_noidle(bc->bus_power_dev); in imx8m_blk_ctrl_power_on() [all …]
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D | imx8mp-blk-ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 #include <linux/clk-provider.h> 19 #include <dt-bindings/power/imx8mp-power.h> 104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare() 110 /* de-assert PLL reset */ in clk_hsio_pll_prepare() 111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare() 114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare() 116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare() 124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare() 131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared() [all …]
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D | imx93-blk-ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/power/fsl,imx93-power.h> 103 const struct imx93_blk_ctrl_domain_data *data = domain->data; in imx93_blk_ctrl_set_qos() 104 struct imx93_blk_ctrl *bc = domain->bc; in imx93_blk_ctrl_set_qos() 109 for (i = 0; i < data->num_qos; i++) { in imx93_blk_ctrl_set_qos() 110 qos = &data->qos[i]; in imx93_blk_ctrl_set_qos() 112 mask = PRIO_MASK << qos->cfg_off; in imx93_blk_ctrl_set_qos() 113 mask |= PRIO_MASK << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos() 114 val = qos->cfg_prio << qos->cfg_off; in imx93_blk_ctrl_set_qos() 115 val |= qos->default_prio << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos() [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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D | imx93.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx93-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/fsl,imx93-power.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx93-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/mxs/ |
D | imx23.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx23-pinfunc.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 11 interrupt-parent = <&icoll>; 14 * pre-existing /chosen node to be available to insert the 31 #address-cells = <1>; 32 #size-cells = <0>; 35 compatible = "arm,arm926ej-s"; 42 compatible = "simple-bus"; [all …]
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D | imx28.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx28-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 12 interrupt-parent = <&icoll>; 15 * pre-existing /chosen node to be available to insert the 42 #address-cells = <1>; 43 #size-cells = <0>; 46 compatible = "arm,arm926ej-s"; [all …]
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/linux-6.12.1/drivers/clk/imx/ |
D | clk-imx6sx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <linux/clk-provider.h> 37 static const char *pcie_axi_sels[] = { "axi", "ahb", }; 131 clk_hw_data->num = IMX6SX_CLK_CLK_END; in imx6sx_clocks_init() 132 hws = clk_hw_data->hws; in imx6sx_clocks_init() 147 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop"); in imx6sx_clocks_init() 178 clk_set_parent(hws[IMX6SX_PLL1_BYPASS]->clk, hws[IMX6SX_CLK_PLL1]->clk); in imx6sx_clocks_init() 179 clk_set_parent(hws[IMX6SX_PLL2_BYPASS]->clk, hws[IMX6SX_CLK_PLL2]->clk); in imx6sx_clocks_init() 180 clk_set_parent(hws[IMX6SX_PLL3_BYPASS]->clk, hws[IMX6SX_CLK_PLL3]->clk); in imx6sx_clocks_init() [all …]
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