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/linux-6.12.1/drivers/staging/fbtft/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 tristate "Support for small TFT LCD display modules"
11 tristate "FB driver for the AGM1264K-FL LCD display"
14 Framebuffer support for the AGM1264K-FL LCD display (two Samsung KS0108 compatible chips)
17 tristate "FB driver for the BD663474 LCD Controller"
23 tristate "FB driver for the HX8340BN LCD Controller"
29 tristate "FB driver for the HX8347D LCD Controller"
35 tristate "FB driver for the HX8353D LCD Controller"
41 tristate "FB driver for the HX8357D LCD Controller"
47 tristate "FB driver for the ILI9163 LCD Controller"
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/linux-6.12.1/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON)
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
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Dingenic,lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs LCD controller
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4760-lcd
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Dmarvell,pxa2xx-lcdc.txt1 PXA LCD Controller
2 ------------------
5 - compatible : one of these
6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
9 - reg : should contain 1 register range (address and length).
10 - interrupts : framebuffer controller interrupt.
11 - clocks: phandle to input clocks
14 - lcd-supply: A phandle to a power regulator that controls the LCD voltage.
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Datmel,lcdc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Dharma Balasubiramani <dharma.b@microchip.com>
14 The LCD Controller (LCDC) consists of logic for transferring LCD image data
15 from an external display buffer to a TFT LCD panel. The LCDC has one display
17 interface and a look-up table to allow palletized display configurations. The
18 LCDC is programmable on a per layer basis, and supports different LCD
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Dintel,keembay-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Keem Bay display controller
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
15 const: intel,keembay-display
19 - description: LCD registers range
21 reg-names:
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/linux-6.12.1/drivers/gpu/drm/panel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 tristate "ABT Y030XX067A 320x480 LCD panel"
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
46 as found in the YLM RS-97 handheld gaming console.
49 tristate "Boe BF060Y8M-AJ0 panel"
54 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
66 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
68 the host and has a built-in LED backlight.
71 tristate "Boe TH101MB31UIG002-28A panel"
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/linux-6.12.1/drivers/auxdisplay/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # see Documentation/kbuild/kconfig-language.rst.
20 # Character LCD section
23 tristate "Character LCD core support" if COMPILE_TEST
25 This is the base system for character-based LCD displays.
28 This is some character LCD core interface that multiple drivers can
32 tristate "Common functions for HD44780 (and compatibles) LCD displays" if COMPILE_TEST
42 tristate "HD44780 Character LCD support"
46 Enable support for Character LCDs using a HD44780 controller.
47 The LCD is accessible through the /dev/lcd char device (10, 156).
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Darm-charlcd.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the on-board character LCD found on some ARM reference boards
4 * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
21 #define DRIVERNAME "arm-charlcd"
57 * struct charlcd - Private data structure
59 * @phybase: the offset to the controller in physical memory
61 * @virtbase: the offset to the controller in virtual memory
63 * @complete: completion structure for the last LCD command
78 struct charlcd *lcd = data; in charlcd_interrupt() local
81 status = readl(lcd->virtbase + CHAR_STAT) & 0x01; in charlcd_interrupt()
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/linux-6.12.1/Documentation/devicetree/bindings/display/panel/
Dolimex,lcd-olinuxino.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Olimex Ltd. LCD-OLinuXino bridge panel.
10 - Stefan Mavrodiev <stefan@olimex.com>
13 This device can be used as bridge between a host controller and LCD panels.
15 - LCD-OLinuXino-4.3TS
16 - LCD-OLinuXino-5
17 - LCD-OLinuXino-7
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/linux-6.12.1/Documentation/admin-guide/auxdisplay/
Dks0108.rst2 ks0108 LCD Controller Driver Documentation
7 :Date: 2006-10-27
19 ---------------------
21 This driver supports the ks0108 LCD controller.
25 ---------------------
28 :Device Name: KS0108 LCD Controller
30 :Webpage: -
31 :Device Webpage: -
32 :Type: LCD Controller (Liquid Crystal Display Controller)
43 ---------
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/linux-6.12.1/Documentation/devicetree/bindings/display/atmel/
Datmel,hlcdc-display-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/atmel/atmel,hlcdc-display-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel's High LCD Controller (HLCDC)
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Alexandre Belloni <alexandre.belloni@bootlin.com>
12 - Claudiu Beznea <claudiu.beznea@tuxon.dev>
15 The LCD Controller (LCDC) consists of logic for transferring LCD image
16 data from an external display buffer to a TFT LCD panel. The LCDC has one
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/linux-6.12.1/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hitachi HD44780 Character LCD Controller
10 - Geert Uytterhoeven <geert@linux-m68k.org>
13 The Hitachi HD44780 Character LCD Controller is commonly used on character
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
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/linux-6.12.1/drivers/video/backlight/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Backlight & LCD drivers configuration
6 menu "Backlight & LCD device support"
9 # LCD
12 tristate "Lowlevel LCD controls"
14 This framework adds support for low-level control of LCD.
15 Some framebuffer devices connect to platform-specific LCD modules
16 in order to have a platform-specific way to control the flat panel
17 (contrast and applying power to the LCD (not to the backlight!)).
19 To have support for your specific LCD panel you will have to
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Dhx8357.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the Himax HX-8357 LCD Controller
10 #include <linux/lcd.h>
216 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_spi_write_then_read() local
231 return -ENOMEM; in hx8357_spi_write_then_read()
252 ret = spi_sync(lcd->spi, &msg); in hx8357_spi_write_then_read()
254 dev_err(&lcdev->dev, "Couldn't send SPI data\n"); in hx8357_spi_write_then_read()
289 * The controller needs 120ms when entering in sleep mode before we can in hx8357_enter_standby()
306 * The controller needs 120ms when exiting from sleep mode before we in hx8357_exit_standby()
320 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_lcd_reset() local
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/linux-6.12.1/drivers/video/fbdev/
Dpxa3xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * LCD Controller Registers and Bits Definitions
8 #define LCCR0 (0x000) /* LCD Controller Control Register 0 */
9 #define LCCR1 (0x004) /* LCD Controller Control Register 1 */
10 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */
11 #define LCCR3 (0x00C) /* LCD Controller Control Register 3 */
12 #define LCCR4 (0x010) /* LCD Controller Control Register 4 */
13 #define LCCR5 (0x014) /* LCD Controller Control Register 5 */
14 #define LCSR (0x038) /* LCD Controller Status Register 0 */
15 #define LCSR1 (0x034) /* LCD Controller Status Register 1 */
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Dau1200fb.c3 * Au1200 LCD Driver.
5 * Copyright 2004-2005 AMD
9 * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
44 #include <linux/dma-mapping.h>
48 #include <asm/mach-au1x00/au1000.h>
49 #include <asm/mach-au1x00/au1200fb.h> /* platform_data */
53 #define DRIVER_DESC "LCD controller driver for AU1200 processors"
146 /* Private, per-framebuffer management information (independent of the panel itself) */
160 /* LCD controller restrictions */
179 static struct au1200_lcd *lcd = (struct au1200_lcd *) AU1200_LCD_ADDR; variable
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Dsa1100fb.h3 * -- StrongARM 1100 LCD Controller Frame Buffer Device
15 #define LCCR0 0x0000 /* LCD Control Reg. 0 */
16 #define LCSR 0x0004 /* LCD Status Reg. */
17 #define DBAR1 0x0010 /* LCD DMA Base Address Reg. channel 1 */
18 #define DCAR1 0x0014 /* LCD DMA Current Address Reg. channel 1 */
19 #define DBAR2 0x0018 /* LCD DMA Base Address Reg. channel 2 */
20 #define DCAR2 0x001C /* LCD DMA Current Address Reg. channel 2 */
21 #define LCCR1 0x0020 /* LCD Control Reg. 1 */
22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */
23 #define LCCR3 0x0028 /* LCD Control Reg. 3 */
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Dsa1100fb.c11 * StrongARM 1100 LCD Controller Frame Buffer Driver
16 * linux-arm-kernel@lists.arm.linux.org.uk
26 * - With the Neponset plugged into an Assabet, LCD powerdown
27 * doesn't work (LCD stays powered up). Therefore we shouldn't
29 * - We don't limit the CPU clock rate nor the mode selection
33 * - Linear grayscale palettes and the kernel.
44 * - The following must never be specified in a panel definition:
47 * - The following should be specified:
57 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
66 * - FrameBuffer memory is now allocated at run-time when the
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/linux-6.12.1/drivers/video/fbdev/omap/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 bool "External LCD controller support"
15 external LCD controller connected to the SoSSI/RFBI interface.
18 bool "Epson HWA742 LCD controller support"
22 Epson HWA742 LCD controller.
28 Say Y here, if your user-space applications are capable of
34 bool "MIPI DBI-C/DCS compatible LCD support"
38 the Mobile Industry Processor Interface DBI-C/DCS
/linux-6.12.1/Documentation/devicetree/bindings/display/armada/
Dmarvell,dove-lcd.txt4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
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/linux-6.12.1/drivers/gpu/drm/mxsfb/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "i.MX (e)LCDIF LCD controller"
18 Choose this option if you have an LCDIF or eLCDIF LCD controller.
25 tristate "i.MX LCDIFv3 LCD controller"
35 Choose this option if you have an LCDIFv3 LCD controller.
39 If M is selected the module will be called imx-lcdif.
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91sam9x5_lcd.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
4 * LCD controller.
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "atmel,at91sam9x5-hlcdc";
20 clock-names = "periph_clk","sys_clk", "slow_clk";
23 hlcdc-display-controller {
24 compatible = "atmel,hlcdc-display-controller";
25 #address-cells = <1>;
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/linux-6.12.1/Documentation/fb/
Dsa1100fb.rst8 This is a driver for a graphic framebuffer for the SA-1100 LCD
9 controller.
19 controller. The bits per pixel (bpp) value should be 4, 8, 12, or
20 16. LCCR values are display-specific and should be computed as
21 documented in the SA-1100 Developer's Manual, Section 11.7. Dual-panel
26 (controlling backlights, powering on the LCD, etc.), the command line
35 lccr0:<value> Configure LCD control register 0 (11.7.3)
36 lccr1:<value> Configure LCD control register 1 (11.7.4)
37 lccr2:<value> Configure LCD control register 2 (11.7.5)
38 lccr3:<value> Configure LCD control register 3 (11.7.6)
/linux-6.12.1/arch/arm/mach-sa1100/include/mach/
DSA-1100.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * FILE SA-1100.h
9 * System StrongARM SA-1100
12 * SA-1100 microprocessor (Advanced RISC Machine (ARM)
14 * StrongARM SA-1100 data sheet version 2.2.
21 #error You must include hardware.h not SA-1100.h
77 * Universal Serial Bus (USB) Device Controller (UDC) control registers
81 * Controller (UDC) Control Register (read/write).
83 * Controller (UDC) Address Register (read/write).
85 * Controller (UDC) Output Maximum Packet size register
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