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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dti,tlv320adcx140.yaml75 PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data
76 PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data
77 PDMIN3 - PDMCLK latching edge used for channel 5 and 6 data
78 PDMIN4 - PDMCLK latching edge used for channel 7 and 8 data
/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx93-src.yaml14 all the system reset signals and boot argument latching.
/linux-6.12.1/Documentation/devicetree/bindings/reset/
Drenesas,rst.yaml16 - Latching of the levels on mode pins when PRESET# is negated,
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dpincfg-node.yaml152 and the delay before latching a value to an output
/linux-6.12.1/drivers/staging/fbtft/
Dfbtft.h172 * @gpio.rd: Read latching signal
173 * @gpio.wr: Write latching signal
/linux-6.12.1/arch/mips/loongson2ef/common/cs5536/
Dcs5536_mfgpt.c157 * before latching the timer count to guarantee that although in mfgpt_read()
/linux-6.12.1/drivers/clocksource/
Dtimer-loongson1-pwm.c175 * before latching the timer count to guarantee that although in ls1x_clocksource_read()
Di8253.c45 * before latching the timer count to guarantee that although in i8253_read()
/linux-6.12.1/drivers/hwmon/
Dsbtsi_temp.c84 * reading integer part triggers latching of the decimal part, in sbtsi_read()
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Daq100x.c114 /* Read (and reset) the latching version of the status */ in aq100x_intr_handler()
Dael1002.c695 * The GPIO Interrupt register on the AEL2020 is a "Latching High" in ael2020_intr_clear()
/linux-6.12.1/drivers/net/ethernet/sfc/
Dio.h22 * doorbell register pair, which has its own latching, and
/linux-6.12.1/drivers/cpufreq/
Dsa1110-cpufreq.c156 * half speed or use delayed read latching (errata 13). in sdram_calculate_timing()
/linux-6.12.1/drivers/net/ethernet/sfc/falcon/
Dio.h57 * doorbell register pair, which has its own latching, and
/linux-6.12.1/drivers/net/ethernet/sfc/siena/
Dio.h57 * doorbell register pair, which has its own latching, and
/linux-6.12.1/drivers/net/pcs/
Dpcs-xpcs.c905 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
938 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_irq.c596 * to be reset to avoid possible bit re-latching from lower in xe_irq_reset()
/linux-6.12.1/drivers/iio/imu/bmi160/
Dbmi160_core.c604 /* Set the pin to input mode with no latching. */ in bmi160_config_pin()
/linux-6.12.1/sound/soc/codecs/
Dtas5720.c281 * Periodically toggle SDZ (shutdown bit) H->L->H to clear any latching in tas5720_fault_check_work()
/linux-6.12.1/drivers/net/ethernet/cavium/thunder/
Dthunder_bgx.c892 /* Clear rcvflt bit (latching high) and read it back */ in bgx_xaui_check_link()
1007 /* Receive link is latching low. Force it high and verify it */ in bgx_poll_for_link()
/linux-6.12.1/drivers/platform/x86/intel/pmc/
Dcore.c1065 * For LPM mode latching we set the latch enable bit and selected mode in pmc_core_lpm_latch_mode_write()
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_color.c59 * following the latching of any double buffered registers
976 * Once PSR exit (and proper register latching) has occurred the in skl_color_commit_noarm()
/linux-6.12.1/drivers/tty/serial/
Dsc16is7xx.c249 #define SC16IS7XX_IOCONTROL_LATCH_BIT BIT(0) /* Enable input latching */
/linux-6.12.1/drivers/net/ethernet/faraday/
Dftgmac100.c1273 * the HW has been latching RX/TX packet interrupts while in ftgmac100_poll()
/linux-6.12.1/drivers/media/platform/ti/am437x/
Dam437x-vpfe.c519 /* Disable latching function registers on VSYNC */ in vpfe_ccdc_config_raw()

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