Searched +full:k3 +full:- +full:am654 (Results 1 – 25 of 59) sorted by relevance
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/linux-6.12.1/arch/arm64/boot/dts/ti/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only 6 # Copyright (C) 2016-2021 Texas Instruments Incorporated - https://www.ti.com/ 12 dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb 13 dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-ov5640.dtbo 14 dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo 15 dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb 16 dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb 17 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb 18 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb 19 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-mallow.dtb [all …]
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D | k3-am6548-iot2050-advanced-pg2.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2023 9 * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 2 10 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6548-iot2050-advanced-common.dtsi" 19 #include "k3-am65-iot2050-common-pg2.dtsi" 20 #include "k3-am65-iot2050-arduino-connector.dtsi" 21 #include "k3-am65-iot2050-dp.dtsi" [all …]
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D | k3-am65.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 16 model = "Texas Instruments K3 AM654 SoC"; 17 compatible = "ti,am654"; 18 interrupt-parent = <&gic500>; [all …]
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D | k3-am6528-iot2050-basic-pg2.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2021 9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 2 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6528-iot2050-basic-common.dtsi" 19 #include "k3-am65-iot2050-common-pg2.dtsi" 20 #include "k3-am65-iot2050-dp.dtsi" 21 #include "k3-am65-iot2050-usb3.dtsi" 24 compatible = "siemens,iot2050-basic-pg2", "ti,am654";
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D | k3-am6548-iot2050-advanced.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2021 9 * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 1 10 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6548-iot2050-advanced-common.dtsi" 19 #include "k3-am65-iot2050-common-pg1.dtsi" 20 #include "k3-am65-iot2050-arduino-connector.dtsi" 23 compatible = "siemens,iot2050-advanced", "ti,am654";
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D | k3-am6528-iot2050-basic.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2021 9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 1 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6528-iot2050-basic-common.dtsi" 19 #include "k3-am65-iot2050-common-pg1.dtsi" 22 compatible = "siemens,iot2050-basic", "ti,am654";
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D | k3-am654-pcie-usb2.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for SERDES personality card: 2lane PCIe + USB2.0 Host on AM654 EVM 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/phy/phy-am654-serdes.h> 13 #include "k3-pinctrl.h" 16 assigned-clocks = <&k3_clks 153 4>, 19 assigned-clock-parents = <&k3_clks 153 8>, [all …]
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D | k3-am654-pcie-usb3.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/phy/phy-am654-serdes.h> 14 #include "k3-pinctrl.h" 21 num-lanes = <1>; 23 phy-names = "pcie-phy0"; [all …]
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D | k3-am6548-iot2050-advanced-m2.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2023 9 * AM6548-based (quad-core) IOT2050 M.2 variant (based on Advanced Product 10 * Generation 2), 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 #include "k3-am6548-iot2050-advanced-common.dtsi" 17 #include "k3-am65-iot2050-common-pg2.dtsi" 18 #include "k3-am65-iot2050-arduino-connector.dtsi" 19 #include "k3-am65-iot2050-dp.dtsi" 22 compatible = "siemens,iot2050-advanced-m2", "ti,am654"; [all …]
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D | k3-am6548-iot2050-advanced-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2021 12 /dts-v1/; 14 #include "k3-am654.dtsi" 15 #include "k3-am65-iot2050-common.dtsi" 26 main_mmc0_pins_default: main-mmc0-default-pins { 27 pinctrl-single,pins = < 48 pinctrl-names = "default"; 49 pinctrl-0 = <&main_mmc0_pins_default>; 50 bus-width = <8>; [all …]
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D | k3-am652.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include "k3-am65.dtsi" 12 #address-cells = <1>; 13 #size-cells = <0>; 14 cpu-map { 27 compatible = "arm,cortex-a53"; 30 enable-method = "psci"; 31 i-cache-size = <0x8000>; 32 i-cache-line-size = <64>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/ |
D | ti,pru-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 Each Programmable Real-Time Unit and Industrial Communication Subsystem 14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called 15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU 17 use the Data RAMs present within the PRU-ICSS for code execution. 19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary [all …]
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D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI K3 R5F processor subsystems 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F 20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode 21 called "Single-CPU" mode, where only Core0 is used, but with ability to use 27 Each Dual-Core R5F sub-system is represented as a single DTS node [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/arm/ti/ |
D | k3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/ti/k3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments K3 Multicore SoC architecture 10 - Nishanth Menon <nm@ti.com> 13 Platforms based on Texas Instruments K3 Multicore SoC architecture 22 - description: K3 AM62A7 SoC 24 - enum: 25 - ti,am62a7-sk [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/hwinfo/ |
D | ti,k3-socinfo.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwinfo/ti,k3-socinfo.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments K3 Multicore SoC platforms chipid module 10 - Tero Kristo <t-kristo@ti.com> 11 - Nishanth Menon <nm@ti.com> 14 Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is 20 pattern: "^chipid@[0-9a-f]+$" 24 - const: ti,am654-chipid [all …]
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/linux-6.12.1/drivers/dma/ti/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_TI_CPPI41) += cppi41.o 3 obj-$(CONFIG_TI_EDMA) += edma.o 4 obj-$(CONFIG_DMA_OMAP) += omap-dma.o 5 obj-$(CONFIG_TI_K3_UDMA) += k3-udma.o 6 obj-$(CONFIG_TI_K3_UDMA_GLUE_LAYER) += k3-udma-glue.o 7 k3-psil-lib-objs := k3-psil.o \ 8 k3-psil-am654.o \ 9 k3-psil-j721e.o \ 10 k3-psil-j7200.o \ [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/ti/ |
D | k3-ringacc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Texas Instruments K3 NavigatorSS Ring Accelerator 11 - Santosh Shilimkar <ssantosh@kernel.org> 12 - Grygorii Strashko <grygorii.strashko@ti.com> 26 management of the packet queues. The K3 SoCs can have more than one RA instances 29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# [all …]
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D | ti,j721e-system-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/soc/ti/ti,j721e-system-controller.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 represent as any specific type of device. The typical use-case is 15 for some other node's driver, or platform-specific code, to acquire 22 - Kishon Vijay Abraham I <kishon@kernel.org> 23 - Roger Quadros <rogerq@kernel.org> 28 - enum: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/dma/ti/ |
D | k3-udma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 5 --- 6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml# 7 $schema: http://devicetree.org/meta-schemas/core.yaml# 9 title: Texas Instruments K3 NAVSS Unified DMA 12 - Peter Ujfalusi <peter.ujfalusi@gmail.com> 15 The UDMA-P is intended to perform similar (but significantly upgraded) 16 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P 18 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA 29 on the Rx PSI-L interface. [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/hwlock/ |
D | ti,omap-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI HwSpinlock for OMAP and K3 based SoCs 10 - Suman Anna <s-anna@ti.com> 15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs 16 - ti,am64-hwspinlock # for K3 AM64x SoCs 17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs 22 "#hwlock-cells": [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mtd/ |
D | ti,am654-hbmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,am654-hbmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: HyperBus Memory Controller (HBMC) on TI's K3 family of SoCs 10 - Vignesh Raghavendra <vigneshr@ti.com> 14 const: ti,am654-hbmc 19 power-domains: true 20 '#address-cells': true 21 '#size-cells': true [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mailbox/ |
D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI OMAP2+ and K3 Mailbox devices 10 - Suman Anna <s-anna@ti.com> 35 lines can also be routed to different processor sub-systems on DRA7xx as they 37 K3 AM65x, J721E and J7200 SoCs has each of these instances form a cluster and 49 within a SoC. The sub-mailboxes (actual communication channels) are 56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | ti,k3-am654-cpsw-nuss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Siddharth Vadapalli <s-vadapalli@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 22 Complex (UDMA-P) controller. 52 "#address-cells": true 53 "#size-cells": true 57 - ti,am642-cpsw-nuss [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/serial/ |
D | 8250_omap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: 8250 compliant UARTs on TI's OMAP2+ and K3 SoCs 10 - Vignesh Raghavendra <vigneshr@ti.com> 13 - $ref: /schemas/serial/serial.yaml# 14 - $ref: /schemas/serial/rs485.yaml# 19 - enum: 20 - ti,am3352-uart 21 - ti,am4372-uart [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/spi/ |
D | omap-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/omap-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI Controller on OMAP and K3 SoCs 10 - Aswath Govindraju <a-govindraju@ti.com> 13 - $ref: spi-controller.yaml# 18 - items: 19 - enum: 20 - ti,am654-mcspi [all …]
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