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/linux-6.12.1/Documentation/devicetree/bindings/display/
Dingenic,lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs LCD controller
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4760-lcd
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/linux-6.12.1/arch/mips/boot/dts/ingenic/
Djz4740.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4740";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
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Djz4725b.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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Dqi_lb60.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "jz4740.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/iio/adc/ingenic,adc.h>
8 #include <dt-bindings/clock/ingenic,tcu.h>
9 #include <dt-bindings/input/input.h>
18 compatible = "qi,lb60", "ingenic,jz4740";
27 stdout-path = &uart0;
30 vcc: regulator-0 {
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Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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/linux-6.12.1/drivers/clk/ingenic/
Djz4740-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4740 SoC CGU driver
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
51 0x0, 0x1, -1, 0x3,
71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
98 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1, 0,
110 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
112 CGU_REG_CPCCR, 0, 1, 4, 22, -1, -1, 0,
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/linux-6.12.1/drivers/gpu/drm/ingenic/
Dingenic-drm-drv.c1 // SPDX-License-Identifier: GPL-2.0
7 #include "ingenic-drm.h"
12 #include <linux/dma-mapping.h>
14 #include <linux/media-bus-format.h>
87 * f0 (aka. foreground0) can be overlayed. Z-order is fixed in
146 priv_state = drm_atomic_get_private_obj_state(state, &priv->private_obj); in ingenic_drm_get_priv_state()
158 priv_state = drm_atomic_get_new_private_obj_state(state, &priv->private_obj); in ingenic_drm_get_new_priv_state()
209 return priv->dma_hwdescs_phys + offset; in dma_hwdesc_addr()
220 mutex_lock(&priv->clk_mutex); in ingenic_drm_update_pixclk()
221 priv->update_clk_rate = true; in ingenic_drm_update_pixclk()
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/linux-6.12.1/drivers/pwm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
48 will be called pwm-ab8500.
67 will be called pwm-apple.
77 will be called pwm-atmel.
85 (Atmel High-end LCD Controller). This PWM output is mainly used
86 to control the LCD backlight.
89 will be called pwm-atmel-hlcdc.
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/linux-6.12.1/drivers/pinctrl/
Dpinctrl-ingenic.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <linux/pinctrl/pinconf-generic.h>
173 (!(enabled_socs & GENMASK(version - 1, 0)) in is_soc_or_above()
174 || jzpc->info->version >= version); in is_soc_or_above()
212 INGENIC_PIN_GROUP("mmc-1bit", jz4730_mmc_1bit, 1),
213 INGENIC_PIN_GROUP("mmc-4bit", jz4730_mmc_4bit, 1),
214 INGENIC_PIN_GROUP("uart0-data", jz4730_uart0_data, 1),
215 INGENIC_PIN_GROUP("uart1-data", jz4730_uart1_data, 1),
216 INGENIC_PIN_GROUP("uart2-data", jz4730_uart2_data, 1),
217 INGENIC_PIN_GROUP("uart3-data", jz4730_uart3_data, 1),
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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