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Searched +full:jpu +full:- +full:r8a7790 (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/media/
Drenesas,jpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/renesas,jpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
13 The JPEG processing unit (JPU) incorporates the JPEG codec with an encoding
15 JPU can encode image data and decode JPEG data quickly.
20 - enum:
21 - renesas,jpu-r8a7790 # R-Car H2
22 - renesas,jpu-r8a7791 # R-Car M2-W
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/linux-6.12.1/arch/arm/boot/dts/renesas/
Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
16 compatible = "renesas,r8a7790";
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux-6.12.1/drivers/media/platform/renesas/
Drcar_jpu.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Cogent Embedded, Inc. <source@cogentembedded.com>
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
7 * This is based on the drivers/media/platform/samsung/s5p-jpeg driver by
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fh.h>
35 #include <media/v4l2-mem2mem.h>
36 #include <media/v4l2-ioctl.h>
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/linux-6.12.1/drivers/clk/renesas/
Dr8a7790-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
3 * r8a7790 Clock Pulse Generator / Module Standby and Software Reset
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
97 DEF_MOD("jpu", 106, R8A7790_CLK_M2),
101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),
102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
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