Searched +full:jh7110 +full:- +full:stgcrg (Results 1 – 6 of 6) sorted by relevance
| /linux-6.12.1/arch/riscv/boot/dts/starfive/ |
| D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "starfive,jh7110";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
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| /linux-6.12.1/Documentation/devicetree/bindings/pci/ |
| D | starfive,jh7110-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/starfive,jh7110-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 PCIe host controller
10 - Kevin Xie <kevin.xie@starfivetech.com>
13 - $ref: plda,xpressrich3-axi-common.yaml#
17 const: starfive,jh7110-pcie
21 - description: NOC bus clock
22 - description: Transport layer clock
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| /linux-6.12.1/Documentation/devicetree/bindings/usb/ |
| D | starfive,jh7110-usb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller
10 - Minda Chen <minda.chen@starfivetech.com>
14 const: starfive,jh7110-usb
18 starfive,stg-syscon:
19 $ref: /schemas/types.yaml#/definitions/phandle-array
21 - items:
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | starfive,jh7110-stgcrg.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-stgcrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 System-Top-Group Clock and Reset Generator
10 - Xingyu Wu <xingyu.wu@starfivetech.com>
14 const: starfive,jh7110-stgcrg
21 - description: Main Oscillator (24 MHz)
22 - description: HIFI4 core
23 - description: STG AXI/AHB
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | starfive,jh7110-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 USB 2.0 PHY
10 - Minda Chen <minda.chen@starfivetech.com>
14 const: starfive,jh7110-usb-phy
19 "#phy-cells":
24 - description: PHY 125m
25 - description: app 125m
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| /linux-6.12.1/drivers/clk/starfive/ |
| D | clk-starfive-jh7110-stg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * StarFive JH7110 System-Top-Group Clock Driver
9 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/starfive,jh7110-crg.h>
15 #include "clk-starfive-jh7110.h"
40 /* pci-e */
81 unsigned int idx = clkspec->args[0]; in jh7110_stgclk_get()
84 return &priv->reg[idx].hw; in jh7110_stgclk_get()
86 return ERR_PTR(-EINVAL); in jh7110_stgclk_get()
95 priv = devm_kzalloc(&pdev->dev, struct_size(priv, reg, JH7110_STGCLK_END), in jh7110_stgcrg_probe()
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