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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dstarfive,jh7110-pwmdac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/starfive,jh7110-pwmdac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 PWM-DAC Controller
10 The PWM-DAC Controller uses PWM square wave generators plus RC filters to
11 form a DAC for audio play in StarFive JH7110 SoC. This audio play controller
16 - Hal Feng <hal.feng@starfivetech.com>
19 - $ref: dai-common.yaml#
23 const: starfive,jh7110-pwmdac
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/linux-6.12.1/sound/soc/starfive/
Djh7110_pwmdac.c1 // SPDX-License-Identifier: GPL-2.0
3 * jh7110_pwmdac.c -- StarFive JH7110 PWM-DAC driver
5 * Copyright (C) 2021-2023 StarFive Technology Co., Ltd.
115 value = jh7110_pwmdac_read_reg(dev->base, JH7110_PWMDAC_CTRL); in jh7110_pwmdac_set_enable()
121 jh7110_pwmdac_write_reg(dev->base, JH7110_PWMDAC_CTRL, value); in jh7110_pwmdac_set_enable()
128 value = jh7110_pwmdac_read_reg(dev->base, JH7110_PWMDAC_CTRL); in jh7110_pwmdac_set_shift()
129 if (dev->cfg.shift == PWMDAC_SHIFT_8) in jh7110_pwmdac_set_shift()
131 else if (dev->cfg.shift == PWMDAC_SHIFT_10) in jh7110_pwmdac_set_shift()
134 jh7110_pwmdac_write_reg(dev->base, JH7110_PWMDAC_CTRL, value); in jh7110_pwmdac_set_shift()
141 value = jh7110_pwmdac_read_reg(dev->base, JH7110_PWMDAC_CTRL); in jh7110_pwmdac_set_duty_cycle()
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/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include "jh7110.dtsi"
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
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Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "starfive,jh7110";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
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/linux-6.12.1/drivers/clk/starfive/
Dclk-starfive-jh7110-sys.c1 // SPDX-License-Identifier: GPL-2.0
3 * StarFive JH7110 System Clock Driver
11 #include <linux/clk-provider.h>
17 #include <soc/starfive/reset-starfive-jh71x0.h>
19 #include <dt-bindings/clock/starfive,jh7110-crg.h>
21 #include "clk-starfive-jh7110.h"
259 /* pwmdac */
329 unsigned int idx = clkspec->args[0]; in jh7110_sysclk_get()
332 return &priv->reg[idx].hw; in jh7110_sysclk_get()
334 return ERR_PTR(-EINVAL); in jh7110_sysclk_get()
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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