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/linux-6.12.1/Documentation/devicetree/bindings/hwmon/
Dstarfive,jh71x0-temp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwmon/starfive,jh71x0-temp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Emil Renner Berthing <kernel@esmil.dk>
18 - starfive,jh7100-temp
19 - starfive,jh7110-temp
28 clock-names:
30 - const: sense
31 - const: bus
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/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7100.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh7100.h>
12 compatible = "starfive,jh7100";
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "sifive,u74-mc", "riscv";
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/linux-6.12.1/drivers/hwmon/
Dsfctemp.c1 // SPDX-License-Identifier: GPL-2.0
19 * TempSensor reset. The RSTN can be de-asserted once the analog core has
21 * 0:reset 1:de-assert
27 * Tpu(min 50us) after PD is de-asserted. RSTN should be held low until the
41 * Temp(C)=DOUT*Y/4094 - K
65 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_up()
68 writel(0, sfctemp->regs); in sfctemp_power_up()
72 /* de-assert reset */ in sfctemp_power_up()
73 writel(SFCTEMP_RSTN, sfctemp->regs); in sfctemp_power_up()
79 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_down()
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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