Searched +full:j721s2 +full:- +full:wave521c (Results 1 – 6 of 6) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/media/cnm,wave521c.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Chips&Media Wave 5 Series multi-standard codec IP10 - Nas Chung <nas.chung@chipsnmedia.com>11 - Jackson Lee <jackson.lee@chipsnmedia.com>19 - enum:20 - ti,j721s2-wave521c21 - const: cnm,wave521c[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/mux/mux.h>9 #include <dt-bindings/phy/phy.h>10 #include <dt-bindings/phy/phy-ti.h>12 #include "k3-serdes.h"15 serdes_refclk: clock-serdes {16 #clock-cells = <0>;17 compatible = "fixed-clock";25 compatible = "mmio-sram";[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT3 * Device Tree Source for J721S2 SoC Family Main Domain peripherals5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/phy/phy-cadence.h>9 #include <dt-bindings/phy/phy-ti.h>12 serdes_refclk: clock-cmnrefclk {13 #clock-cells = <0>;14 compatible = "fixed-clock";15 clock-frequency = <0>;21 compatible = "mmio-sram";[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/10 compatible = "mmio-sram";12 #address-cells = <1>;13 #size-cells = <1>;17 gic500: interrupt-controller@1800000 {18 compatible = "arm,gic-v3";25 #address-cells = <2>;26 #size-cells = <2>;28 #interrupt-cells = <3>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/10 compatible = "mmio-sram";11 #address-cells = <1>;12 #size-cells = <1>;15 gic500: interrupt-controller@1800000 {16 compatible = "arm,gic-v3";17 #address-cells = <2>;18 #size-cells = <2>;20 #interrupt-cells = <3>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)3 * Wave5 series multi-standard codec IP - platform driver5 * Copyright (C) 2021-2023 CHIPS&MEDIA INC14 #include "wave5-vpu.h"15 #include "wave5-regdefine.h"16 #include "wave5-vpuconfig.h"38 ret = wait_for_completion_timeout(&inst->irq_done, in wave5_vpu_wait_interrupt()41 return -ETIMEDOUT; in wave5_vpu_wait_interrupt()43 reinit_completion(&inst->irq_done); in wave5_vpu_wait_interrupt()60 list_for_each_entry(inst, &dev->instances, list) { in wave5_vpu_handle_irq()[all …]