Home
last modified time | relevance | path

Searched +full:j721e +full:- +full:usb (Results 1 – 21 of 21) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dti,j721e-usb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI wrapper module for the Cadence USBSS-DRD controller
10 - Roger Quadros <rogerq@kernel.org>
15 - const: ti,j721e-usb
16 - items:
17 - const: ti,am64-usb
18 - const: ti,j721e-usb
[all …]
/linux-6.12.1/drivers/phy/ti/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "TI DA8xx USB PHY Driver"
11 Enable this to support the USB PHY on DA8xx SoCs.
13 This driver controls both the USB 1.1 PHY and the USB 2.0 PHY.
16 tristate "TI dm816x USB PHY driver"
22 Enable this for dm816x USB to work.
37 tristate "TI J721E WIZ (SERDES Wrapper) support"
46 This option enables support for WIZ module present in TI's J721E
73 The USB OTG controller communicates with the comparator using this
92 Support for TI TUSB1210 USB ULPI PHY.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o
3 obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o
4 obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
5 obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o
6 obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
7 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
8 obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
9 obj-$(CONFIG_PHY_AM654_SERDES) += phy-am654-serdes.o
10 obj-$(CONFIG_PHY_TI_GMII_SEL) += phy-gmii-sel.o
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-j722s-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clk-0 {
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <0>;
21 compatible = "ti,am64-wiz-10g";
23 #address-cells = <1>;
[all …]
Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J721E SoC Family Main Domain peripherals
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
[all …]
Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
[all …]
Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
12 #include "k3-serdes.h"
15 serdes_refclk: clock-serdes {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
25 compatible = "mmio-sram";
[all …]
Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
[all …]
Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
[all …]
Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
Dk3-am62p-j722s-common-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 gic500: interrupt-controller@1800000 {
16 compatible = "arm,gic-v3";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 #interrupt-cells = <3>;
[all …]
Dk3-j721e-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
16 compatible = "ti,j721e-sk", "ti,j721e";
17 model = "Texas Instruments J721E SK";
[all …]
Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]
/linux-6.12.1/drivers/usb/cdns3/
DKconfig2 tristate "Cadence USB Support"
3 depends on USB_SUPPORT && (USB || USB_GADGET) && HAS_DMA
8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
34 Cadence USBSS-DEV driver.
41 depends on USB=y || USB=USB_CDNS3
51 tristate "Cadence USB3 support on PCIe-based platforms"
[all …]
Dcdns3-ti.c1 // SPDX-License-Identifier: GPL-2.0
3 * cdns3-ti.c - TI specific Glue layer for Cadence USB Controller
5 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
14 #include <linux/dma-mapping.h>
21 /* USB Wrapper register offsets */
81 return readl(data->usbss + offset); in cdns_ti_readl()
86 writel(value, data->usbss + offset); in cdns_ti_writel()
103 struct device *dev = &pdev->dev; in cdns_ti_probe()
104 struct device_node *node = pdev->dev.of_node; in cdns_ti_probe()
113 return -ENOMEM; in cdns_ti_probe()
[all …]
/linux-6.12.1/drivers/dma/ti/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 is currently used by the USB driver on AM335x and DA8xx platforms.
27 tristate "Texas Instruments sDMA (omap-dma) support"
48 DMA engine is used in AM65x and j721e.
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 such as PCIe, USB, SGMII, QSGMII etc.
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
[all …]
/linux-6.12.1/drivers/mmc/host/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
94 implements a hardware byte swapper using a 32-bit datum.
123 disabled, it will steal the MMC cards away - rendering them
495 MOXA provides one multi-functional card reader which can
496 be found on some embedded hardware such as UC-7112-LX.
547 of Alcor Micro PCI-E card reader
691 tristate "DMA for SDHI SD/SDIO controllers using SYS-DMAC"
696 using SYS-DMAC via DMA Engine. This supports the controllers
700 tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
706 using on-chip bus mastering. This supports the controllers
[all …]
/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]
/linux-6.12.1/drivers/phy/cadence/
Dphy-cadence-torrent.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-cadence.h>
12 #include <linux/clk-provider.h>
239 [CDNS_TORRENT_REFCLK_DRIVER] = "refclk-driver",
240 [CDNS_TORRENT_DERIVED_REFCLK] = "refclk-der",
241 [CDNS_TORRENT_RECEIVED_REFCLK] = "refclk-rec",
468 for (i = 0; i < tbl->num_entries; i++) { in cdns_torrent_get_tbl_vals()
469 if (tbl->entries[i].key == key) in cdns_torrent_get_tbl_vals()
470 return tbl->entries[i].vals; in cdns_torrent_get_tbl_vals()
[all …]