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Searched +full:j721e +full:- +full:csi2rx (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/media/
Dti,j721e-csi2rx-shim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/ti,j721e-csi2rx-shim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI J721E CSI2RX Shim
10 The TI J721E CSI2RX Shim is a wrapper around Cadence CSI2RX bridge that
11 enables sending captured frames to memory over PSI-L DMA. In the J721E
16 - Jai Luthra <j-luthra@ti.com>
20 const: ti,j721e-csi2rx-shim
25 dma-names:
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Dcdns,csi2rx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/cdns,csi2rx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence MIPI-CSI2 RX controller
10 - Maxime Ripard <mripard@kernel.org>
13 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
19 - enum:
20 - starfive,jh7110-csi2rx
21 - ti,j721e-csi2rx
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/linux-6.12.1/drivers/media/platform/ti/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
67 tristate "TI J721E CSI2RX wrapper layer driver"
75 Support for TI CSI2RX wrapper layer. This just enables the wrapper driver.
76 The Cadence CSI2RX bridge driver needs to be enabled separately.
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-y += am437x/
3 obj-y += cal/
4 obj-y += vpe/
5 obj-y += davinci/
6 obj-y += j721e-csi2rx/
7 obj-y += omap/
8 obj-y += omap3isp/
/linux-6.12.1/drivers/media/platform/ti/j721e-csi2rx/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_VIDEO_TI_J721E_CSI2RX) += j721e-csi2rx.o
Dj721e-csi2rx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI CSI2RX Shim Wrapper Driver
5 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
8 * Author: Jai Luthra <j-luthra@ti.com>
17 #include <media/mipi-csi2.h>
18 #include <media/v4l2-device.h>
19 #include <media/v4l2-ioctl.h>
20 #include <media/v4l2-mc.h>
21 #include <media/videobuf2-dma-contig.h>
23 #define TI_CSI2RX_MODULE_NAME "j721e-csi2rx"
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/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
12 #include "k3-serdes.h"
15 serdes_refclk: clock-serdes {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
25 compatible = "mmio-sram";
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Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J721E SoC Family Main Domain peripherals
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
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Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
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Dk3-am62p-j722s-common-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 gic500: interrupt-controller@1800000 {
16 compatible = "arm,gic-v3";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 #interrupt-cells = <3>;
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Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
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/linux-6.12.1/drivers/dma/ti/
Dk3-psil-j721e.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
9 #include "k3-psil-priv.h"
69 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
86 /* PDMA6 (PSIL_PDMA_MCASP_G0) - McASP0-2 */
90 /* PDMA7 (PSIL_PDMA_MCASP_G1) - McASP3-11 */
100 /* PDMA8 (PDMA_MISC_G0) - SPI0-1 */
109 /* PDMA9 (PDMA_MISC_G1) - SPI2-3 */
118 /* PDMA10 (PDMA_MISC_G2) - SPI4-5 */
136 /* PDMA13 (PDMA_USART_G0) - UART0-1 */
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/linux-6.12.1/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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