Searched full:ir0_clk (Results 1 – 2 of 2) sorted by relevance
69 clocks = <&apb0_gates 6>, <&ir0_clk>;
629 static SUNXI_CCU_MP_WITH_MUX_GATE(ir0_clk, "ir0", ir_parents, 0x0d0,922 &ir0_clk.common,1125 [CLK_IR0] = &ir0_clk.common.hw,