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Searched full:ipg_clk (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/fsl-dcu/
Dfsl_tcon.c80 tcon->ipg_clk = of_clk_get_by_name(np, "ipg"); in fsl_tcon_init()
81 if (IS_ERR(tcon->ipg_clk)) { in fsl_tcon_init()
86 ret = clk_prepare_enable(tcon->ipg_clk); in fsl_tcon_init()
104 clk_disable_unprepare(tcon->ipg_clk); in fsl_tcon_free()
105 clk_put(tcon->ipg_clk); in fsl_tcon_free()
Dfsl_tcon.h20 struct clk *ipg_clk; member
/linux-6.12.1/drivers/irqchip/
Dirq-imx-irqsteer.c31 struct clk *ipg_clk; member
177 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_irqsteer_probe()
178 if (IS_ERR(data->ipg_clk)) in imx_irqsteer_probe()
179 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_irqsteer_probe()
206 ret = clk_prepare_enable(data->ipg_clk); in imx_irqsteer_probe()
248 clk_disable_unprepare(data->ipg_clk); in imx_irqsteer_probe()
263 clk_disable_unprepare(irqsteer_data->ipg_clk); in imx_irqsteer_remove()
291 clk_disable_unprepare(irqsteer_data->ipg_clk); in imx_irqsteer_suspend()
301 ret = clk_prepare_enable(irqsteer_data->ipg_clk); in imx_irqsteer_resume()
Dirq-imx-intmux.c74 struct clk *ipg_clk; member
229 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_intmux_probe()
230 if (IS_ERR(data->ipg_clk)) in imx_intmux_probe()
231 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_intmux_probe()
241 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_probe()
285 clk_disable_unprepare(data->ipg_clk); in imx_intmux_probe()
319 clk_disable_unprepare(data->ipg_clk); in imx_intmux_runtime_suspend()
330 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_runtime_resume()
/linux-6.12.1/drivers/pwm/
Dpwm-fsl-ftm.c49 struct clk *ipg_clk; member
91 ret = clk_prepare_enable(fpc->ipg_clk); in fsl_pwm_request()
111 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_free()
359 ret = clk_prepare_enable(fpc->ipg_clk); in fsl_pwm_init()
367 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_init()
440 * ipg_clk is the interface clock for the IP. If not provided, use the in fsl_pwm_probe()
443 fpc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in fsl_pwm_probe()
444 if (IS_ERR(fpc->ipg_clk)) in fsl_pwm_probe()
445 fpc->ipg_clk = fpc->clk[FSL_PWM_CLK_SYS]; in fsl_pwm_probe()
476 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_suspend()
[all …]
/linux-6.12.1/drivers/iio/adc/
Dimx93_adc.c74 struct clk *ipg_clk; member
267 *val = clk_get_rate(adc->ipg_clk); in imx93_adc_read_raw()
328 adc->ipg_clk = devm_clk_get(dev, "ipg"); in imx93_adc_probe()
329 if (IS_ERR(adc->ipg_clk)) in imx93_adc_probe()
330 return dev_err_probe(dev, PTR_ERR(adc->ipg_clk), in imx93_adc_probe()
353 ret = clk_prepare_enable(adc->ipg_clk); in imx93_adc_probe()
392 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_probe()
415 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_remove()
425 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_runtime_suspend()
445 ret = clk_prepare_enable(adc->ipg_clk); in imx93_adc_runtime_resume()
Dimx8qxp-adc.c95 struct clk *ipg_clk; member
339 adc->ipg_clk = devm_clk_get(dev, "ipg"); in imx8qxp_adc_probe()
340 if (IS_ERR(adc->ipg_clk)) in imx8qxp_adc_probe()
341 return dev_err_probe(dev, PTR_ERR(adc->ipg_clk), "Failed getting clock\n"); in imx8qxp_adc_probe()
369 ret = clk_prepare_enable(adc->ipg_clk); in imx8qxp_adc_probe()
398 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_probe()
420 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_remove()
435 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_runtime_suspend()
459 ret = clk_prepare_enable(adc->ipg_clk); in imx8qxp_adc_runtime_resume()
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dfsl,micfil.yaml58 - const: ipg_clk
92 clock-names = "ipg_clk", "ipg_clk_app";
/linux-6.12.1/sound/soc/fsl/
Dfsl_asrc_common.h63 * @ipg_clk: clock source to drive peripheral
85 struct clk *ipg_clk; member
Dfsl_audmix.c473 priv->ipg_clk = devm_clk_get(dev, "ipg"); in fsl_audmix_probe()
474 if (IS_ERR(priv->ipg_clk)) { in fsl_audmix_probe()
476 return PTR_ERR(priv->ipg_clk); in fsl_audmix_probe()
520 ret = clk_prepare_enable(priv->ipg_clk); in fsl_audmix_runtime_resume()
538 clk_disable_unprepare(priv->ipg_clk); in fsl_audmix_runtime_suspend()
Dfsl_asrc.c999 * On iMX6, ipg_clk = 133MHz, REG_ASR76K = 0x06D6, REG_ASR56K = 0x0947 in fsl_asrc_init()
1001 ipg_rate = clk_get_rate(asrc->ipg_clk); in fsl_asrc_init()
1123 asrc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in fsl_asrc_probe()
1124 if (IS_ERR(asrc->ipg_clk)) { in fsl_asrc_probe()
1126 return PTR_ERR(asrc->ipg_clk); in fsl_asrc_probe()
1273 ret = clk_prepare_enable(asrc->ipg_clk); in fsl_asrc_runtime_resume()
1331 clk_disable_unprepare(asrc->ipg_clk); in fsl_asrc_runtime_resume()
1352 clk_disable_unprepare(asrc->ipg_clk); in fsl_asrc_runtime_suspend()
Dfsl_xcvr.c40 struct clk *ipg_clk; member
1318 xcvr->ipg_clk = devm_clk_get(dev, "ipg"); in fsl_xcvr_probe()
1319 if (IS_ERR(xcvr->ipg_clk)) { in fsl_xcvr_probe()
1321 return PTR_ERR(xcvr->ipg_clk); in fsl_xcvr_probe()
1441 clk_disable_unprepare(xcvr->ipg_clk); in fsl_xcvr_runtime_suspend()
1457 ret = clk_prepare_enable(xcvr->ipg_clk); in fsl_xcvr_runtime_resume()
1525 clk_disable_unprepare(xcvr->ipg_clk); in fsl_xcvr_runtime_resume()
Dfsl_audmix.h98 struct clk *ipg_clk; member
Dfsl_micfil.c1190 /* ipg_clk is used to control the registers in fsl_micfil_probe()
1200 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
/linux-6.12.1/drivers/pmdomain/imx/
Dgpc.c458 struct clk *ipg_clk; in imx_gpc_probe() local
462 ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_gpc_probe()
463 if (IS_ERR(ipg_clk)) in imx_gpc_probe()
464 return PTR_ERR(ipg_clk); in imx_gpc_probe()
465 ipg_rate_mhz = clk_get_rate(ipg_clk) / 1000000; in imx_gpc_probe()
/linux-6.12.1/drivers/nvmem/
Dimx-ocotp.c246 * ipg_clk. OTP writes will work at maximum bus frequencies as long in imx_ocotp_set_imx6_timing()
250 * correctly that are independent of the ipg_clk. Those values are not in imx_ocotp_set_imx6_timing()
265 * of ipg_clk periods." where Tpgm and Trd refer to STROBE_PROG in imx_ocotp_set_imx6_timing()
/linux-6.12.1/drivers/tty/serial/
Dfsl_lpuart.c265 struct clk *ipg_clk; member
413 ret = clk_prepare_enable(sport->ipg_clk); in __lpuart_enable_clks()
419 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
424 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
435 return clk_get_rate(sport->ipg_clk); in lpuart_get_baud_clk_rate()
2796 ret = clk_prepare_enable(sport->ipg_clk); in lpuart_global_reset()
2814 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2832 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2879 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
2880 if (IS_ERR(sport->ipg_clk)) { in lpuart_probe()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dfsl,fec.yaml101 The "ahb", for MAC ipg_clk, ipg_clk_mac that are bus clock.
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mn.dtsi370 clock-names = "ipg_clk", "ipg_clk_app",
Dimx93.dtsi567 clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
Dimx8mm.dtsi398 clock-names = "ipg_clk", "ipg_clk_app",
Dimx95.dtsi1303 clock-names = "ipg_clk", "ipg_clk_app",
Dimx8mp.dtsi1527 clock-names = "ipg_clk", "ipg_clk_app",