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/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dpci-iommu.txt2 relationship between PCI(e) devices and IOMMU(s).
17 Requester ID. While a given PCI device can only master through one IOMMU, a
18 root complex may split masters across a set of IOMMUs (e.g. with one IOMMU per
22 and a mechanism is required to map from a PCI device to its IOMMU and sideband
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
33 -------------------
35 - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
39 (rid-base,iommu,iommu-base,length).
41 Any RID r in the interval [rid-base, rid-base + length) is associated with
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Dapple,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Kettenis <kettenis@openbsd.org>
22 the standard "reset-gpios" and "max-link-speed" properties appear on
34 - enum:
35 - apple,t8103-pcie
36 - apple,t8112-pcie
37 - apple,t6000-pcie
38 - const: apple,pcie
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/linux-6.12.1/Documentation/devicetree/bindings/misc/
Dfsl,qoriq-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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/linux-6.12.1/Documentation/devicetree/bindings/bus/
Dxlnx,versal-net-cdx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 on run-time.
17 All devices on the CDX bus will have a unique streamid (for IOMMU)
20 are used to configure SMMU and GIC-ITS respectively.
22 iommu-map property is used to define the set of stream ids
23 corresponding to each device and the associated IOMMU.
26 The msi-map property is used to associate the devices with the
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/linux-6.12.1/Documentation/devicetree/bindings/virtio/
Dpci-iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: virtio-iommu device using the virtio-pci transport
10 - Jean-Philippe Brucker <jean-philippe@linaro.org>
13 When virtio-iommu uses the PCI transport, its programming interface is
15 device tree statically describes the relation between IOMMU and DMA
16 masters. Therefore, the PCI root complex that hosts the virtio-iommu
17 contains a child node representing the IOMMU device explicitly.
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/linux-6.12.1/drivers/vfio/
Dvfio_iommu_type1.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * VFIO: IOMMU DMA mapping support for Type1 IOMMU
12 * We arbitrarily define a Type1 IOMMU as one matching the below code.
13 * It could be called the x86 IOMMU as it's designed for AMD-Vi & Intel
14 * VT-d, but that makes it harder to re-use as theoretically anyone
15 * implementing a similar IOMMU could make use of this. We expect the
16 * IOMMU to support the IOMMU API and have few to no restrictions around
17 * the IOVA range that can be mapped. The Type1 IOMMU is currently
19 * userspace pages pinned into memory. We also assume devices and IOMMU
20 * domains are PCI based as the IOMMU API is still centered around a
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/linux-6.12.1/arch/sparc/kernel/
Diommu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* iommu.c: Generic sparc64 IOMMU support.
13 #include <linux/dma-map-ops.h>
15 #include <linux/iommu-helper.h>
17 #include <asm/iommu-common.h>
23 #include <asm/iommu.h>
29 ((STC)->strbuf_ctxmatch_base + ((CTX) << 3))
31 (*((STC)->strbuf_flushflag) = 0UL)
33 (*((STC)->strbuf_flushflag) != 0UL)
49 /* Must be invoked under the IOMMU lock. */
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Diommu-common.c1 // SPDX-License-Identifier: GPL-2.0
3 * IOMMU mmap management and range allocation functions.
4 * Based almost entirely upon the powerpc iommu allocator.
10 #include <linux/iommu-helper.h>
11 #include <linux/dma-mapping.h>
13 #include <asm/iommu-common.h>
19 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
21 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
24 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
26 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
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Dpci_sun4v.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <linux/dma-map-ops.h>
21 #include <asm/iommu-common.h>
23 #include <asm/iommu.h>
58 unsigned long prot; /* IOMMU page protections */
72 p->dev = dev; in iommu_batch_start()
73 p->prot = prot; in iommu_batch_start()
74 p->entry = entry; in iommu_batch_start()
75 p->npages = 0; in iommu_batch_start()
78 static inline bool iommu_use_atu(struct iommu *iommu, u64 mask) in iommu_use_atu() argument
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/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt600x-die0.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
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/linux-6.12.1/drivers/vdpa/vdpa_sim/
Dvdpa_sim.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/dma-map-ops.h>
32 MODULE_PARM_DESC(batch_mapping, "Batched mapping 1 -Enable; 0 - Disable");
58 struct vdpasim *vdpasim = mm_work->vdpasim; in vdpasim_mm_work_fn()
60 mm_work->ret = 0; in vdpasim_mm_work_fn()
63 vdpasim->mm_bound = mm_work->mm_to_bind; in vdpasim_mm_work_fn()
69 struct kthread_work *work = &mm_work->work; in vdpasim_worker_change_mm_sync()
72 kthread_queue_work(vdpasim->worker, work); in vdpasim_worker_change_mm_sync()
87 if (!vq->cb) in vdpasim_vq_notify()
90 vq->cb(vq->private); in vdpasim_vq_notify()
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/linux-6.12.1/Documentation/driver-api/
Dvfio.rst2 VFIO - "Virtual Function I/O" [1]_
7 allotted. This includes x86 hardware with AMD-Vi and Intel VT-d,
9 systems such as Freescale PAMU. The VFIO driver is an IOMMU/device
11 a secure, IOMMU protected environment. In other words, this allows
12 safe [2]_, non-privileged, userspace drivers.
19 bare-metal device drivers [3]_.
22 field, also benefit from low-overhead, direct device access from
23 userspace. Examples include network adapters (often non-TCP/IP based)
27 which has no notion of IOMMU protection, limited interrupt support,
36 ---------------------------
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/linux-6.12.1/drivers/iommu/
Dmsm_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
13 #include <linux/io-pgtable.h>
18 #include <linux/iommu.h>
25 #include "msm_iommu_hw-8xxx.h"
54 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument
58 ret = clk_enable(iommu->pclk); in __enable_clocks()
62 if (iommu->clk) { in __enable_clocks()
63 ret = clk_enable(iommu->clk); in __enable_clocks()
65 clk_disable(iommu->pclk); in __enable_clocks()
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Dof_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OF helpers for IOMMU
9 #include <linux/iommu.h>
20 #include "iommu-priv.h"
28 if (!of_device_is_available(iommu_spec->np)) in of_iommu_xlate()
29 return -ENODEV; in of_iommu_xlate()
31 ret = iommu_fwspec_init(dev, of_fwnode_handle(iommu_spec->np)); in of_iommu_xlate()
32 if (ret == -EPROBE_DEFER) in of_iommu_xlate()
37 ops = iommu_ops_from_fwnode(&iommu_spec->np->fwnode); in of_iommu_xlate()
38 if (!ops->of_xlate || !try_module_get(ops->owner)) in of_iommu_xlate()
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/linux-6.12.1/Documentation/userspace-api/
Diommufd.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 IOMMUFD is the user API to control the IOMMU subsystem as it relates to managing
16 drivers are eventually expected to deprecate any internal IOMMU logic
20 I/O page tables for all IOMMUs, with room in the design to add non-generic
24 small letter (iommufd) refers to the file descriptors created via /dev/iommu for
31 --------------------
35 - IOMMUFD_OBJ_IOAS, representing an I/O address space (IOAS), allowing map/unmap
39 container it copies an IOVA map to a list of iommu_domains held within it.
41 - IOMMUFD_OBJ_DEVICE, representing a device that is bound to iommufd by an
44 - IOMMUFD_OBJ_HW_PAGETABLE, representing an actual hardware I/O page table
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/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dp5020si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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Dp3041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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Dp2041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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Dp5040si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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/linux-6.12.1/arch/sparc/mm/
Diommu.c1 // SPDX-License-Identifier: GPL-2.0
3 * iommu.c: IOMMU specific routines for memory management.
15 #include <linux/dma-map-ops.h>
26 #include <asm/iommu.h>
60 struct iommu_struct *iommu; in sbus_iommu_init() local
67 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); in sbus_iommu_init()
68 if (!iommu) { in sbus_iommu_init()
69 prom_printf("Unable to allocate iommu structure\n"); in sbus_iommu_init()
73 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
75 if (!iommu->regs) { in sbus_iommu_init()
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/linux-6.12.1/drivers/acpi/arm64/
Diort.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/iommu.h>
21 #include <linux/dma-map-ops.h>
45 * iort_set_fwnode() - Create iort_fwnode and use it to register
46 * iommu data in the iort_fwnode_list
48 * @iort_node: IORT table node associated with the IOMMU
62 return -ENOMEM; in iort_set_fwnode()
64 INIT_LIST_HEAD(&np->list); in iort_set_fwnode()
65 np->iort_node = iort_node; in iort_set_fwnode()
66 np->fwnode = fwnode; in iort_set_fwnode()
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
Dgk20a.c30 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
32 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
35 * In both cases CPU read and writes are performed by creating a write-combined
74 * Used for objects flattened using the IOMMU API
86 /* array of base.mem->size pages (+ dma_addr_ts) */
103 /* Only used if IOMMU if present */
130 return (u64)gk20a_instobj(memory)->mn->offset << 12; in gk20a_instobj_addr()
136 return (u64)gk20a_instobj(memory)->mn->length << 12; in gk20a_instobj_size()
145 struct gk20a_instmem *imem = obj->base.imem; in gk20a_instobj_iommu_recycle_vaddr()
147 WARN_ON(obj->use_cpt); in gk20a_instobj_iommu_recycle_vaddr()
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/linux-6.12.1/arch/x86/kernel/
Damd_gart_64.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Use the integrated AGP GART in the Hammer northbridge as an IOMMU for PCI.
9 * See Documentation/core-api/dma-api-howto.rst for the interface specification.
29 #include <linux/iommu-helper.h>
34 #include <linux/dma-direct.h>
35 #include <linux/dma-map-ops.h>
38 #include <asm/iommu.h>
52 * If this is disabled the IOMMU will use an optimized flushing strategy
103 if (offset == -1) { in alloc_iommu()
109 if (offset != -1) { in alloc_iommu()
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/linux-6.12.1/lib/
Diommu-helper.c1 // SPDX-License-Identifier: GPL-2.0
3 * IOMMU helper functions for the free area management
7 #include <linux/iommu-helper.h>
9 unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, in iommu_area_alloc() argument
17 size -= 1; in iommu_area_alloc()
19 index = bitmap_find_next_zero_area(map, size, start, nr, align_mask); in iommu_area_alloc()
22 start = ALIGN(shift + index, boundary_size) - shift; in iommu_area_alloc()
25 bitmap_set(map, index, nr); in iommu_area_alloc()
28 return -1; in iommu_area_alloc()
/linux-6.12.1/drivers/iommu/intel/
Ddmar.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2006-2008 Intel Corporation
14 * These routines are used by both DMA-remapping and Interrupt-remapping
28 #include <linux/iommu.h>
33 #include "iommu.h"
35 #include "../iommu-pages.h"
50 * 1) The hotplug framework guarentees that DMAR unit will be hot-added
52 * 2) The hotplug framework guarantees that DMAR unit will be hot-removed
68 static void free_iommu(struct intel_iommu *iommu);
76 if (drhd->include_all) in dmar_register_drhd_unit()
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